chan_reg           38 drivers/dma/sh/shdma.h 	void __iomem *chan_reg;
chan_reg           75 drivers/dma/sh/shdmac.c 	__raw_writel(val, shdev->chan_reg + chan_pdata->chclr_offset);
chan_reg           90 drivers/dma/sh/shdmac.c 	void __iomem *addr = shdev->chan_reg + DMAOR;
chan_reg          100 drivers/dma/sh/shdmac.c 	void __iomem *addr = shdev->chan_reg + DMAOR;
chan_reg          273 drivers/dma/sh/shdmac.c 		addr = shdev->chan_reg;
chan_reg          537 drivers/dma/sh/shdmac.c 	sh_chan->base = shdev->chan_reg + chan_pdata->offset;
chan_reg          722 drivers/dma/sh/shdmac.c 	shdev->chan_reg = devm_ioremap_resource(&pdev->dev, chan);
chan_reg          723 drivers/dma/sh/shdmac.c 	if (IS_ERR(shdev->chan_reg))
chan_reg          724 drivers/dma/sh/shdmac.c 		return PTR_ERR(shdev->chan_reg);
chan_reg          181 drivers/dma/stm32-dma.c 	struct stm32_dma_chan_reg chan_reg;
chan_reg          200 drivers/dma/stm32-dma.c 	struct stm32_dma_chan_reg chan_reg;
chan_reg          354 drivers/dma/stm32-dma.c 	chan->chan_reg.dma_sfcr &= ~STM32_DMA_SFCR_MASK;
chan_reg          355 drivers/dma/stm32-dma.c 	chan->chan_reg.dma_scr &= ~STM32_DMA_SCR_DMEIE;
chan_reg          359 drivers/dma/stm32-dma.c 		chan->chan_reg.dma_scr |= STM32_DMA_SCR_DMEIE;
chan_reg          362 drivers/dma/stm32-dma.c 		chan->chan_reg.dma_sfcr |= STM32_DMA_SFCR_MASK;
chan_reg          556 drivers/dma/stm32-dma.c 	reg = &sg_req->chan_reg;
chan_reg          602 drivers/dma/stm32-dma.c 			dma_sm0ar = sg_req->chan_reg.dma_sm0ar;
chan_reg          607 drivers/dma/stm32-dma.c 			dma_sm1ar = sg_req->chan_reg.dma_sm1ar;
chan_reg          750 drivers/dma/stm32-dma.c 		chan->chan_reg.dma_sfcr &= ~STM32_DMA_SFCR_FTH_MASK;
chan_reg          751 drivers/dma/stm32-dma.c 		chan->chan_reg.dma_sfcr |= STM32_DMA_SFCR_FTH(threshold);
chan_reg          754 drivers/dma/stm32-dma.c 		chan->chan_reg.dma_spar = chan->dma_sconfig.dst_addr;
chan_reg          799 drivers/dma/stm32-dma.c 		chan->chan_reg.dma_sfcr &= ~STM32_DMA_SFCR_FTH_MASK;
chan_reg          800 drivers/dma/stm32-dma.c 		chan->chan_reg.dma_sfcr |= STM32_DMA_SFCR_FTH(threshold);
chan_reg          803 drivers/dma/stm32-dma.c 		chan->chan_reg.dma_spar = chan->dma_sconfig.src_addr;
chan_reg          815 drivers/dma/stm32-dma.c 	chan->chan_reg.dma_scr &= ~(STM32_DMA_SCR_DIR_MASK |
chan_reg          818 drivers/dma/stm32-dma.c 	chan->chan_reg.dma_scr |= dma_scr;
chan_reg          856 drivers/dma/stm32-dma.c 		chan->chan_reg.dma_scr |= STM32_DMA_SCR_PFCTRL;
chan_reg          858 drivers/dma/stm32-dma.c 		chan->chan_reg.dma_scr &= ~STM32_DMA_SCR_PFCTRL;
chan_reg          874 drivers/dma/stm32-dma.c 		stm32_dma_clear_reg(&desc->sg_req[i].chan_reg);
chan_reg          875 drivers/dma/stm32-dma.c 		desc->sg_req[i].chan_reg.dma_scr = chan->chan_reg.dma_scr;
chan_reg          876 drivers/dma/stm32-dma.c 		desc->sg_req[i].chan_reg.dma_sfcr = chan->chan_reg.dma_sfcr;
chan_reg          877 drivers/dma/stm32-dma.c 		desc->sg_req[i].chan_reg.dma_spar = chan->chan_reg.dma_spar;
chan_reg          878 drivers/dma/stm32-dma.c 		desc->sg_req[i].chan_reg.dma_sm0ar = sg_dma_address(sg);
chan_reg          879 drivers/dma/stm32-dma.c 		desc->sg_req[i].chan_reg.dma_sm1ar = sg_dma_address(sg);
chan_reg          880 drivers/dma/stm32-dma.c 		desc->sg_req[i].chan_reg.dma_sndtr = nb_data_items;
chan_reg          942 drivers/dma/stm32-dma.c 		chan->chan_reg.dma_scr |= STM32_DMA_SCR_CIRC;
chan_reg          944 drivers/dma/stm32-dma.c 		chan->chan_reg.dma_scr |= STM32_DMA_SCR_DBM;
chan_reg          947 drivers/dma/stm32-dma.c 	chan->chan_reg.dma_scr &= ~STM32_DMA_SCR_PFCTRL;
chan_reg          958 drivers/dma/stm32-dma.c 		stm32_dma_clear_reg(&desc->sg_req[i].chan_reg);
chan_reg          959 drivers/dma/stm32-dma.c 		desc->sg_req[i].chan_reg.dma_scr = chan->chan_reg.dma_scr;
chan_reg          960 drivers/dma/stm32-dma.c 		desc->sg_req[i].chan_reg.dma_sfcr = chan->chan_reg.dma_sfcr;
chan_reg          961 drivers/dma/stm32-dma.c 		desc->sg_req[i].chan_reg.dma_spar = chan->chan_reg.dma_spar;
chan_reg          962 drivers/dma/stm32-dma.c 		desc->sg_req[i].chan_reg.dma_sm0ar = buf_addr;
chan_reg          963 drivers/dma/stm32-dma.c 		desc->sg_req[i].chan_reg.dma_sm1ar = buf_addr;
chan_reg          964 drivers/dma/stm32-dma.c 		desc->sg_req[i].chan_reg.dma_sndtr = nb_data_items;
chan_reg         1002 drivers/dma/stm32-dma.c 		stm32_dma_clear_reg(&desc->sg_req[i].chan_reg);
chan_reg         1003 drivers/dma/stm32-dma.c 		desc->sg_req[i].chan_reg.dma_scr =
chan_reg         1011 drivers/dma/stm32-dma.c 		desc->sg_req[i].chan_reg.dma_sfcr |= STM32_DMA_SFCR_MASK;
chan_reg         1012 drivers/dma/stm32-dma.c 		desc->sg_req[i].chan_reg.dma_sfcr |=
chan_reg         1014 drivers/dma/stm32-dma.c 		desc->sg_req[i].chan_reg.dma_spar = src + offset;
chan_reg         1015 drivers/dma/stm32-dma.c 		desc->sg_req[i].chan_reg.dma_sm0ar = dest + offset;
chan_reg         1016 drivers/dma/stm32-dma.c 		desc->sg_req[i].chan_reg.dma_sndtr = xfer_count;
chan_reg         1066 drivers/dma/stm32-dma.c 		return (dma_smar == sg_req->chan_reg.dma_sm0ar);
chan_reg         1071 drivers/dma/stm32-dma.c 	return (dma_smar == sg_req->chan_reg.dma_sm1ar);
chan_reg         1216 drivers/dma/stm32-dma.c 	stm32_dma_clear_reg(&chan->chan_reg);
chan_reg         1218 drivers/dma/stm32-dma.c 	chan->chan_reg.dma_scr = cfg->stream_config & STM32_DMA_SCR_CFG_MASK;
chan_reg         1219 drivers/dma/stm32-dma.c 	chan->chan_reg.dma_scr |= STM32_DMA_SCR_REQ(cfg->request_line);
chan_reg         1222 drivers/dma/stm32-dma.c 	chan->chan_reg.dma_scr |= STM32_DMA_SCR_TEIE | STM32_DMA_SCR_TCIE;