ch_data           577 drivers/gpu/drm/gma500/cdv_intel_dp.c 	uint32_t ch_data = ch_ctl + 4;
ch_data           606 drivers/gpu/drm/gma500/cdv_intel_dp.c 			REG_WRITE(ch_data + i,
ch_data           663 drivers/gpu/drm/gma500/cdv_intel_dp.c 		unpack_aux(REG_READ(ch_data + i),
ch_data          1293 drivers/gpu/drm/i915/display/intel_dp.c 	i915_reg_t ch_ctl, ch_data[5];
ch_data          1305 drivers/gpu/drm/i915/display/intel_dp.c 	for (i = 0; i < ARRAY_SIZE(ch_data); i++)
ch_data          1306 drivers/gpu/drm/i915/display/intel_dp.c 		ch_data[i] = intel_dp->aux_ch_data_reg(intel_dp, i);
ch_data          1372 drivers/gpu/drm/i915/display/intel_dp.c 						   ch_data[i >> 2],
ch_data          1450 drivers/gpu/drm/i915/display/intel_dp.c 		intel_dp_unpack_aux(intel_uncore_read(uncore, ch_data[i >> 2]),
ch_data            53 drivers/iio/adc/spear_adc.c 	u32 ch_data[SPEAR_ADC_CHANNEL_NUM];
ch_data            66 drivers/iio/adc/spear_adc.c 	struct chan_data ch_data[SPEAR_ADC_CHANNEL_NUM];