ch_cached_lsr     219 drivers/tty/serial/jsm/jsm.h 	u8		ch_cached_lsr;	/* Cached value of the LSR register */
ch_cached_lsr     369 drivers/tty/serial/jsm/jsm_cls.c 	linestatus = ch->ch_cached_lsr;
ch_cached_lsr     370 drivers/tty/serial/jsm/jsm_cls.c 	ch->ch_cached_lsr = 0;
ch_cached_lsr     290 drivers/tty/serial/jsm/jsm_neo.c 	linestatus = ch->ch_cached_lsr;
ch_cached_lsr     291 drivers/tty/serial/jsm/jsm_neo.c 	ch->ch_cached_lsr = 0;
ch_cached_lsr     405 drivers/tty/serial/jsm/jsm_neo.c 			ch->ch_cached_lsr = linestatus;
ch_cached_lsr     502 drivers/tty/serial/jsm/jsm_neo.c 		ch->ch_cached_lsr |= lsrbits;
ch_cached_lsr     503 drivers/tty/serial/jsm/jsm_neo.c 		if (ch->ch_cached_lsr & UART_LSR_THRE) {
ch_cached_lsr     504 drivers/tty/serial/jsm/jsm_neo.c 			ch->ch_cached_lsr &= ~(UART_LSR_THRE);
ch_cached_lsr     843 drivers/tty/serial/jsm/jsm_neo.c 	ch->ch_cached_lsr |= linestatus;
ch_cached_lsr     845 drivers/tty/serial/jsm/jsm_neo.c 	if (ch->ch_cached_lsr & UART_LSR_DR) {
ch_cached_lsr    1335 drivers/tty/serial/jsm/jsm_neo.c 	ch->ch_cached_lsr |= lsr;
ch_cached_lsr     240 drivers/tty/serial/jsm/jsm_tty.c 	channel->ch_cached_lsr = 0;