cg_spll_spread_spectrum_2 4037 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	si_pi->clock_registers.cg_spll_spread_spectrum_2 = RREG32(CG_SPLL_SPREAD_SPECTRUM_2);
cg_spll_spread_spectrum_2 4874 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		cpu_to_be32(si_pi->clock_registers.cg_spll_spread_spectrum_2);
cg_spll_spread_spectrum_2 5256 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	u32 cg_spll_spread_spectrum_2 = si_pi->clock_registers.cg_spll_spread_spectrum_2;
cg_spll_spread_spectrum_2 5298 drivers/gpu/drm/amd/amdgpu/si_dpm.c 			cg_spll_spread_spectrum_2 &= ~CLK_V_MASK;
cg_spll_spread_spectrum_2 5299 drivers/gpu/drm/amd/amdgpu/si_dpm.c 			cg_spll_spread_spectrum_2 |= CLK_V(clk_v);
cg_spll_spread_spectrum_2 5309 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	sclk->vCG_SPLL_SPREAD_SPECTRUM_2 = cg_spll_spread_spectrum_2;
cg_spll_spread_spectrum_2  354 drivers/gpu/drm/amd/amdgpu/si_dpm.h 	u32 cg_spll_spread_spectrum_2;
cg_spll_spread_spectrum_2  500 drivers/gpu/drm/amd/amdgpu/si_dpm.h 	u32 cg_spll_spread_spectrum_2;
cg_spll_spread_spectrum_2  516 drivers/gpu/drm/amd/amdgpu/si_dpm.h 	u32 cg_spll_spread_spectrum_2;
cg_spll_spread_spectrum_2  911 drivers/gpu/drm/amd/amdgpu/si_dpm.h 	u32 cg_spll_spread_spectrum_2;
cg_spll_spread_spectrum_2  304 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	uint32_t cg_spll_spread_spectrum_2 = data->clock_registers.vCG_SPLL_SPREAD_SPECTRUM_2;
cg_spll_spread_spectrum_2  354 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 			cg_spll_spread_spectrum_2 = PHM_SET_FIELD(cg_spll_spread_spectrum_2,
cg_spll_spread_spectrum_2  363 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	sclk->SpllSpreadSpectrum2  = cg_spll_spread_spectrum_2;
cg_spll_spread_spectrum_2  866 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 	uint32_t cg_spll_spread_spectrum_2 = data->clock_registers.vCG_SPLL_SPREAD_SPECTRUM_2;
cg_spll_spread_spectrum_2  923 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 			cg_spll_spread_spectrum_2 = PHM_SET_FIELD(cg_spll_spread_spectrum_2,
cg_spll_spread_spectrum_2  932 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 	sclk->SpllSpreadSpectrum2  = cg_spll_spread_spectrum_2;
cg_spll_spread_spectrum_2  804 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 	uint32_t cg_spll_spread_spectrum_2 = data->clock_registers.vCG_SPLL_SPREAD_SPECTRUM_2;
cg_spll_spread_spectrum_2  858 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 			cg_spll_spread_spectrum_2 =
cg_spll_spread_spectrum_2  859 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 				PHM_SET_FIELD(cg_spll_spread_spectrum_2, CG_SPLL_SPREAD_SPECTRUM_2, CLKV, clkV);
cg_spll_spread_spectrum_2  867 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 	sclk->SpllSpreadSpectrum2  = cg_spll_spread_spectrum_2;
cg_spll_spread_spectrum_2  547 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	uint32_t cg_spll_spread_spectrum_2 = data->clock_registers.vCG_SPLL_SPREAD_SPECTRUM_2;
cg_spll_spread_spectrum_2  601 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 			cg_spll_spread_spectrum_2 =
cg_spll_spread_spectrum_2  602 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 				PHM_SET_FIELD(cg_spll_spread_spectrum_2, CG_SPLL_SPREAD_SPECTRUM_2, CLKV, clkV);
cg_spll_spread_spectrum_2  610 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	sclk->SpllSpreadSpectrum2  = cg_spll_spread_spectrum_2;
cg_spll_spread_spectrum_2 1884 drivers/gpu/drm/radeon/ci_dpm.c 	pi->clock_registers.cg_spll_spread_spectrum_2 =
cg_spll_spread_spectrum_2 3033 drivers/gpu/drm/radeon/ci_dpm.c 	table->ACPILevel.SpllSpreadSpectrum2 = pi->clock_registers.cg_spll_spread_spectrum_2;
cg_spll_spread_spectrum_2 3168 drivers/gpu/drm/radeon/ci_dpm.c 	u32 cg_spll_spread_spectrum_2 = pi->clock_registers.cg_spll_spread_spectrum_2;
cg_spll_spread_spectrum_2 3200 drivers/gpu/drm/radeon/ci_dpm.c 			cg_spll_spread_spectrum_2 &= ~CLK_V_MASK;
cg_spll_spread_spectrum_2 3201 drivers/gpu/drm/radeon/ci_dpm.c 			cg_spll_spread_spectrum_2 |= CLK_V(clk_v);
cg_spll_spread_spectrum_2 3209 drivers/gpu/drm/radeon/ci_dpm.c 	sclk->SpllSpreadSpectrum2  = cg_spll_spread_spectrum_2;
cg_spll_spread_spectrum_2  133 drivers/gpu/drm/radeon/ci_dpm.h 	u32 cg_spll_spread_spectrum_2;
cg_spll_spread_spectrum_2 1274 drivers/gpu/drm/radeon/cypress_dpm.c 		cpu_to_be32(pi->clk_regs.rv770.cg_spll_spread_spectrum_2);
cg_spll_spread_spectrum_2 1190 drivers/gpu/drm/radeon/ni_dpm.c 	ni_pi->clock_registers.cg_spll_spread_spectrum_2 = RREG32(CG_SPLL_SPREAD_SPECTRUM_2);
cg_spll_spread_spectrum_2 1722 drivers/gpu/drm/radeon/ni_dpm.c 		cpu_to_be32(ni_pi->clock_registers.cg_spll_spread_spectrum_2);
cg_spll_spread_spectrum_2 2010 drivers/gpu/drm/radeon/ni_dpm.c 	u32 cg_spll_spread_spectrum_2 = ni_pi->clock_registers.cg_spll_spread_spectrum_2;
cg_spll_spread_spectrum_2 2053 drivers/gpu/drm/radeon/ni_dpm.c 			cg_spll_spread_spectrum_2 &= ~CLK_V_MASK;
cg_spll_spread_spectrum_2 2054 drivers/gpu/drm/radeon/ni_dpm.c 			cg_spll_spread_spectrum_2 |= CLK_V(clk_v);
cg_spll_spread_spectrum_2 2064 drivers/gpu/drm/radeon/ni_dpm.c 	sclk->vCG_SPLL_SPREAD_SPECTRUM_2 = cg_spll_spread_spectrum_2;
cg_spll_spread_spectrum_2   36 drivers/gpu/drm/radeon/ni_dpm.h 	u32 cg_spll_spread_spectrum_2;
cg_spll_spread_spectrum_2   49 drivers/gpu/drm/radeon/rv730_dpm.c 	u32 cg_spll_spread_spectrum_2 = pi->clk_regs.rv730.cg_spll_spread_spectrum_2;
cg_spll_spread_spectrum_2  103 drivers/gpu/drm/radeon/rv730_dpm.c 			cg_spll_spread_spectrum_2 &= ~CLK_V_MASK;
cg_spll_spread_spectrum_2  104 drivers/gpu/drm/radeon/rv730_dpm.c 			cg_spll_spread_spectrum_2 |= CLK_V(clk_v);
cg_spll_spread_spectrum_2  113 drivers/gpu/drm/radeon/rv730_dpm.c 	sclk->vCG_SPLL_SPREAD_SPECTRUM_2 = cpu_to_be32(cg_spll_spread_spectrum_2);
cg_spll_spread_spectrum_2  209 drivers/gpu/drm/radeon/rv730_dpm.c 	pi->clk_regs.rv730.cg_spll_spread_spectrum_2 =
cg_spll_spread_spectrum_2  353 drivers/gpu/drm/radeon/rv730_dpm.c 		cpu_to_be32(pi->clk_regs.rv730.cg_spll_spread_spectrum_2);
cg_spll_spread_spectrum_2  129 drivers/gpu/drm/radeon/rv740_dpm.c 	u32 cg_spll_spread_spectrum_2 = pi->clk_regs.rv770.cg_spll_spread_spectrum_2;
cg_spll_spread_spectrum_2  171 drivers/gpu/drm/radeon/rv740_dpm.c 			cg_spll_spread_spectrum_2 &= ~CLK_V_MASK;
cg_spll_spread_spectrum_2  172 drivers/gpu/drm/radeon/rv740_dpm.c 			cg_spll_spread_spectrum_2 |= CLK_V(clk_v);
cg_spll_spread_spectrum_2  181 drivers/gpu/drm/radeon/rv740_dpm.c 	sclk->vCG_SPLL_SPREAD_SPECTRUM_2 = cpu_to_be32(cg_spll_spread_spectrum_2);
cg_spll_spread_spectrum_2  296 drivers/gpu/drm/radeon/rv740_dpm.c 	pi->clk_regs.rv770.cg_spll_spread_spectrum_2 =
cg_spll_spread_spectrum_2  497 drivers/gpu/drm/radeon/rv770_dpm.c 	u32 cg_spll_spread_spectrum_2 =
cg_spll_spread_spectrum_2  498 drivers/gpu/drm/radeon/rv770_dpm.c 		pi->clk_regs.rv770.cg_spll_spread_spectrum_2;
cg_spll_spread_spectrum_2  550 drivers/gpu/drm/radeon/rv770_dpm.c 			cg_spll_spread_spectrum_2 &= ~CLKV_MASK;
cg_spll_spread_spectrum_2  551 drivers/gpu/drm/radeon/rv770_dpm.c 			cg_spll_spread_spectrum_2 |= CLKV(clk_v);
cg_spll_spread_spectrum_2  560 drivers/gpu/drm/radeon/rv770_dpm.c 	sclk->vCG_SPLL_SPREAD_SPECTRUM_2 = cpu_to_be32(cg_spll_spread_spectrum_2);
cg_spll_spread_spectrum_2 1060 drivers/gpu/drm/radeon/rv770_dpm.c 		cpu_to_be32(pi->clk_regs.rv770.cg_spll_spread_spectrum_2);
cg_spll_spread_spectrum_2 1528 drivers/gpu/drm/radeon/rv770_dpm.c 	pi->clk_regs.rv770.cg_spll_spread_spectrum_2 =
cg_spll_spread_spectrum_2   34 drivers/gpu/drm/radeon/rv770_dpm.h 	u32 cg_spll_spread_spectrum_2;
cg_spll_spread_spectrum_2   50 drivers/gpu/drm/radeon/rv770_dpm.h 	u32 cg_spll_spread_spectrum_2;
cg_spll_spread_spectrum_2 3577 drivers/gpu/drm/radeon/si_dpm.c 	si_pi->clock_registers.cg_spll_spread_spectrum_2 = RREG32(CG_SPLL_SPREAD_SPECTRUM_2);
cg_spll_spread_spectrum_2 4410 drivers/gpu/drm/radeon/si_dpm.c 		cpu_to_be32(si_pi->clock_registers.cg_spll_spread_spectrum_2);
cg_spll_spread_spectrum_2 4794 drivers/gpu/drm/radeon/si_dpm.c 	u32 cg_spll_spread_spectrum_2 = si_pi->clock_registers.cg_spll_spread_spectrum_2;
cg_spll_spread_spectrum_2 4836 drivers/gpu/drm/radeon/si_dpm.c 			cg_spll_spread_spectrum_2 &= ~CLK_V_MASK;
cg_spll_spread_spectrum_2 4837 drivers/gpu/drm/radeon/si_dpm.c 			cg_spll_spread_spectrum_2 |= CLK_V(clk_v);
cg_spll_spread_spectrum_2 4847 drivers/gpu/drm/radeon/si_dpm.c 	sclk->vCG_SPLL_SPREAD_SPECTRUM_2 = cg_spll_spread_spectrum_2;
cg_spll_spread_spectrum_2   95 drivers/gpu/drm/radeon/si_dpm.h 	u32 cg_spll_spread_spectrum_2;