cg 79 drivers/clk/clk-qoriq.c void (*init_periph)(struct clockgen *cg); cg 99 drivers/clk/clk-qoriq.c static void cg_out(struct clockgen *cg, u32 val, u32 __iomem *reg) cg 101 drivers/clk/clk-qoriq.c if (cg->info.flags & CG_LITTLE_ENDIAN) cg 107 drivers/clk/clk-qoriq.c static u32 cg_in(struct clockgen *cg, u32 __iomem *reg) cg 111 drivers/clk/clk-qoriq.c if (cg->info.flags & CG_LITTLE_ENDIAN) cg 432 drivers/clk/clk-qoriq.c static void __init p2041_init_periph(struct clockgen *cg) cg 436 drivers/clk/clk-qoriq.c reg = ioread32be(&cg->guts->rcwsr[7]); cg 439 drivers/clk/clk-qoriq.c cg->fman[0] = cg->pll[CGA_PLL2].div[PLL_DIV2].clk; cg 441 drivers/clk/clk-qoriq.c cg->fman[0] = cg->pll[PLATFORM_PLL].div[PLL_DIV2].clk; cg 444 drivers/clk/clk-qoriq.c static void __init p4080_init_periph(struct clockgen *cg) cg 448 drivers/clk/clk-qoriq.c reg = ioread32be(&cg->guts->rcwsr[7]); cg 451 drivers/clk/clk-qoriq.c cg->fman[0] = cg->pll[CGA_PLL3].div[PLL_DIV2].clk; cg 453 drivers/clk/clk-qoriq.c cg->fman[0] = cg->pll[PLATFORM_PLL].div[PLL_DIV2].clk; cg 456 drivers/clk/clk-qoriq.c cg->fman[1] = cg->pll[CGA_PLL3].div[PLL_DIV2].clk; cg 458 drivers/clk/clk-qoriq.c cg->fman[1] = cg->pll[PLATFORM_PLL].div[PLL_DIV2].clk; cg 461 drivers/clk/clk-qoriq.c static void __init p5020_init_periph(struct clockgen *cg) cg 466 drivers/clk/clk-qoriq.c reg = ioread32be(&cg->guts->rcwsr[7]); cg 471 drivers/clk/clk-qoriq.c cg->fman[0] = cg->pll[CGA_PLL2].div[div].clk; cg 473 drivers/clk/clk-qoriq.c cg->fman[0] = cg->pll[PLATFORM_PLL].div[PLL_DIV2].clk; cg 476 drivers/clk/clk-qoriq.c static void __init p5040_init_periph(struct clockgen *cg) cg 481 drivers/clk/clk-qoriq.c reg = ioread32be(&cg->guts->rcwsr[7]); cg 486 drivers/clk/clk-qoriq.c cg->fman[0] = cg->pll[CGA_PLL3].div[div].clk; cg 488 drivers/clk/clk-qoriq.c cg->fman[0] = cg->pll[PLATFORM_PLL].div[PLL_DIV2].clk; cg 491 drivers/clk/clk-qoriq.c cg->fman[1] = cg->pll[CGA_PLL3].div[div].clk; cg 493 drivers/clk/clk-qoriq.c cg->fman[1] = cg->pll[PLATFORM_PLL].div[PLL_DIV2].clk; cg 496 drivers/clk/clk-qoriq.c static void __init t1023_init_periph(struct clockgen *cg) cg 498 drivers/clk/clk-qoriq.c cg->fman[0] = cg->hwaccel[1]; cg 501 drivers/clk/clk-qoriq.c static void __init t1040_init_periph(struct clockgen *cg) cg 503 drivers/clk/clk-qoriq.c cg->fman[0] = cg->pll[PLATFORM_PLL].div[PLL_DIV1].clk; cg 506 drivers/clk/clk-qoriq.c static void __init t2080_init_periph(struct clockgen *cg) cg 508 drivers/clk/clk-qoriq.c cg->fman[0] = cg->hwaccel[0]; cg 511 drivers/clk/clk-qoriq.c static void __init t4240_init_periph(struct clockgen *cg) cg 513 drivers/clk/clk-qoriq.c cg->fman[0] = cg->hwaccel[3]; cg 514 drivers/clk/clk-qoriq.c cg->fman[1] = cg->hwaccel[4]; cg 774 drivers/clk/clk-qoriq.c struct clockgen *cg; cg 795 drivers/clk/clk-qoriq.c cg_out(hwc->cg, (clksel << CLKSEL_SHIFT) & CLKSEL_MASK, hwc->reg); cg 806 drivers/clk/clk-qoriq.c clksel = (cg_in(hwc->cg, hwc->reg) & CLKSEL_MASK) >> CLKSEL_SHIFT; cg 830 drivers/clk/clk-qoriq.c static const struct clockgen_pll_div *get_pll_div(struct clockgen *cg, cg 842 drivers/clk/clk-qoriq.c return &cg->pll[pll].div[div]; cg 845 drivers/clk/clk-qoriq.c static struct clk * __init create_mux_common(struct clockgen *cg, cg 867 drivers/clk/clk-qoriq.c div = get_pll_div(cg, hwc, i); cg 893 drivers/clk/clk-qoriq.c hwc->cg = cg; cg 906 drivers/clk/clk-qoriq.c static struct clk * __init create_one_cmux(struct clockgen *cg, int idx) cg 918 drivers/clk/clk-qoriq.c if (cg->info.flags & CG_VER3) cg 919 drivers/clk/clk-qoriq.c hwc->reg = cg->regs + 0x70000 + 0x20 * idx; cg 921 drivers/clk/clk-qoriq.c hwc->reg = cg->regs + 0x20 * idx; cg 923 drivers/clk/clk-qoriq.c hwc->info = cg->info.cmux_groups[cg->info.cmux_to_group[idx]]; cg 932 drivers/clk/clk-qoriq.c clksel = (cg_in(cg, hwc->reg) & CLKSEL_MASK) >> CLKSEL_SHIFT; cg 933 drivers/clk/clk-qoriq.c div = get_pll_div(cg, hwc, clksel); cg 943 drivers/clk/clk-qoriq.c plat_rate = clk_get_rate(cg->pll[PLATFORM_PLL].div[PLL_DIV1].clk); cg 945 drivers/clk/clk-qoriq.c if (cg->info.flags & CG_CMUX_GE_PLAT) cg 950 drivers/clk/clk-qoriq.c return create_mux_common(cg, hwc, &cmux_ops, min_rate, max_rate, cg 954 drivers/clk/clk-qoriq.c static struct clk * __init create_one_hwaccel(struct clockgen *cg, int idx) cg 962 drivers/clk/clk-qoriq.c hwc->reg = cg->regs + 0x20 * idx + 0x10; cg 963 drivers/clk/clk-qoriq.c hwc->info = cg->info.hwaccel[idx]; cg 965 drivers/clk/clk-qoriq.c return create_mux_common(cg, hwc, &hwaccel_ops, 0, ULONG_MAX, 0, cg 969 drivers/clk/clk-qoriq.c static void __init create_muxes(struct clockgen *cg) cg 973 drivers/clk/clk-qoriq.c for (i = 0; i < ARRAY_SIZE(cg->cmux); i++) { cg 974 drivers/clk/clk-qoriq.c if (cg->info.cmux_to_group[i] < 0) cg 976 drivers/clk/clk-qoriq.c if (cg->info.cmux_to_group[i] >= cg 977 drivers/clk/clk-qoriq.c ARRAY_SIZE(cg->info.cmux_groups)) { cg 982 drivers/clk/clk-qoriq.c cg->cmux[i] = create_one_cmux(cg, i); cg 985 drivers/clk/clk-qoriq.c for (i = 0; i < ARRAY_SIZE(cg->hwaccel); i++) { cg 986 drivers/clk/clk-qoriq.c if (!cg->info.hwaccel[i]) cg 989 drivers/clk/clk-qoriq.c cg->hwaccel[i] = create_one_hwaccel(cg, i); cg 1141 drivers/clk/clk-qoriq.c static void __init create_one_pll(struct clockgen *cg, int idx) cg 1145 drivers/clk/clk-qoriq.c struct clockgen_pll *pll = &cg->pll[idx]; cg 1149 drivers/clk/clk-qoriq.c if (!(cg->info.pll_mask & (1 << idx))) cg 1152 drivers/clk/clk-qoriq.c if (cg->coreclk && idx != PLATFORM_PLL) { cg 1153 drivers/clk/clk-qoriq.c if (IS_ERR(cg->coreclk)) cg 1159 drivers/clk/clk-qoriq.c if (cg->info.flags & CG_VER3) { cg 1162 drivers/clk/clk-qoriq.c reg = cg->regs + 0x60080; cg 1165 drivers/clk/clk-qoriq.c reg = cg->regs + 0x80; cg 1168 drivers/clk/clk-qoriq.c reg = cg->regs + 0xa0; cg 1171 drivers/clk/clk-qoriq.c reg = cg->regs + 0x10080; cg 1174 drivers/clk/clk-qoriq.c reg = cg->regs + 0x100a0; cg 1182 drivers/clk/clk-qoriq.c reg = cg->regs + 0xc00; cg 1184 drivers/clk/clk-qoriq.c reg = cg->regs + 0x800 + 0x20 * (idx - 1); cg 1188 drivers/clk/clk-qoriq.c mult = cg_in(cg, reg); cg 1196 drivers/clk/clk-qoriq.c if ((cg->info.flags & CG_VER3) || cg 1197 drivers/clk/clk-qoriq.c ((cg->info.flags & CG_PLL_8BIT) && idx != PLATFORM_PLL)) cg 1233 drivers/clk/clk-qoriq.c static void __init create_plls(struct clockgen *cg) cg 1237 drivers/clk/clk-qoriq.c for (i = 0; i < ARRAY_SIZE(cg->pll); i++) cg 1238 drivers/clk/clk-qoriq.c create_one_pll(cg, i); cg 1319 drivers/clk/clk-qoriq.c struct clockgen *cg = data; cg 1336 drivers/clk/clk-qoriq.c clk = cg->sysclk; cg 1339 drivers/clk/clk-qoriq.c if (idx >= ARRAY_SIZE(cg->cmux)) cg 1341 drivers/clk/clk-qoriq.c clk = cg->cmux[idx]; cg 1344 drivers/clk/clk-qoriq.c if (idx >= ARRAY_SIZE(cg->hwaccel)) cg 1346 drivers/clk/clk-qoriq.c clk = cg->hwaccel[idx]; cg 1349 drivers/clk/clk-qoriq.c if (idx >= ARRAY_SIZE(cg->fman)) cg 1351 drivers/clk/clk-qoriq.c clk = cg->fman[idx]; cg 1354 drivers/clk/clk-qoriq.c pll = &cg->pll[PLATFORM_PLL]; cg 1362 drivers/clk/clk-qoriq.c clk = cg->coreclk; cg 20 drivers/clk/mediatek/clk-gate.c struct mtk_clk_gate *cg = to_mtk_clk_gate(hw); cg 23 drivers/clk/mediatek/clk-gate.c regmap_read(cg->regmap, cg->sta_ofs, &val); cg 25 drivers/clk/mediatek/clk-gate.c val &= BIT(cg->bit); cg 32 drivers/clk/mediatek/clk-gate.c struct mtk_clk_gate *cg = to_mtk_clk_gate(hw); cg 35 drivers/clk/mediatek/clk-gate.c regmap_read(cg->regmap, cg->sta_ofs, &val); cg 37 drivers/clk/mediatek/clk-gate.c val &= BIT(cg->bit); cg 44 drivers/clk/mediatek/clk-gate.c struct mtk_clk_gate *cg = to_mtk_clk_gate(hw); cg 46 drivers/clk/mediatek/clk-gate.c regmap_write(cg->regmap, cg->set_ofs, BIT(cg->bit)); cg 51 drivers/clk/mediatek/clk-gate.c struct mtk_clk_gate *cg = to_mtk_clk_gate(hw); cg 53 drivers/clk/mediatek/clk-gate.c regmap_write(cg->regmap, cg->clr_ofs, BIT(cg->bit)); cg 58 drivers/clk/mediatek/clk-gate.c struct mtk_clk_gate *cg = to_mtk_clk_gate(hw); cg 59 drivers/clk/mediatek/clk-gate.c u32 cgbit = BIT(cg->bit); cg 61 drivers/clk/mediatek/clk-gate.c regmap_update_bits(cg->regmap, cg->sta_ofs, cgbit, cgbit); cg 66 drivers/clk/mediatek/clk-gate.c struct mtk_clk_gate *cg = to_mtk_clk_gate(hw); cg 67 drivers/clk/mediatek/clk-gate.c u32 cgbit = BIT(cg->bit); cg 69 drivers/clk/mediatek/clk-gate.c regmap_update_bits(cg->regmap, cg->sta_ofs, cgbit, 0); cg 156 drivers/clk/mediatek/clk-gate.c struct mtk_clk_gate *cg; cg 160 drivers/clk/mediatek/clk-gate.c cg = kzalloc(sizeof(*cg), GFP_KERNEL); cg 161 drivers/clk/mediatek/clk-gate.c if (!cg) cg 170 drivers/clk/mediatek/clk-gate.c cg->regmap = regmap; cg 171 drivers/clk/mediatek/clk-gate.c cg->set_ofs = set_ofs; cg 172 drivers/clk/mediatek/clk-gate.c cg->clr_ofs = clr_ofs; cg 173 drivers/clk/mediatek/clk-gate.c cg->sta_ofs = sta_ofs; cg 174 drivers/clk/mediatek/clk-gate.c cg->bit = bit; cg 176 drivers/clk/mediatek/clk-gate.c cg->hw.init = &init; cg 178 drivers/clk/mediatek/clk-gate.c clk = clk_register(dev, &cg->hw); cg 180 drivers/clk/mediatek/clk-gate.c kfree(cg); cg 30 drivers/clk/sunxi-ng/ccu_gate.c struct ccu_gate *cg = hw_to_ccu_gate(hw); cg 32 drivers/clk/sunxi-ng/ccu_gate.c return ccu_gate_helper_disable(&cg->common, cg->enable); cg 55 drivers/clk/sunxi-ng/ccu_gate.c struct ccu_gate *cg = hw_to_ccu_gate(hw); cg 57 drivers/clk/sunxi-ng/ccu_gate.c return ccu_gate_helper_enable(&cg->common, cg->enable); cg 70 drivers/clk/sunxi-ng/ccu_gate.c struct ccu_gate *cg = hw_to_ccu_gate(hw); cg 72 drivers/clk/sunxi-ng/ccu_gate.c return ccu_gate_helper_is_enabled(&cg->common, cg->enable); cg 78 drivers/clk/sunxi-ng/ccu_gate.c struct ccu_gate *cg = hw_to_ccu_gate(hw); cg 81 drivers/clk/sunxi-ng/ccu_gate.c if (cg->common.features & CCU_FEATURE_ALL_PREDIV) cg 82 drivers/clk/sunxi-ng/ccu_gate.c rate /= cg->common.prediv; cg 90 drivers/clk/sunxi-ng/ccu_gate.c struct ccu_gate *cg = hw_to_ccu_gate(hw); cg 93 drivers/clk/sunxi-ng/ccu_gate.c if (cg->common.features & CCU_FEATURE_ALL_PREDIV) cg 94 drivers/clk/sunxi-ng/ccu_gate.c div = cg->common.prediv; cg 99 drivers/clk/sunxi-ng/ccu_gate.c if (cg->common.features & CCU_FEATURE_ALL_PREDIV) cg 293 drivers/clk/tegra/clk-dfll.c u32 cg; cg 886 drivers/clk/tegra/clk-dfll.c force_val = (req->lut_index - td->lut_safe) * coef / td->cg; cg 1406 drivers/clk/tegra/clk-dfll.c (td->cg << DFLL_PARAMS_CG_PARAM_SHIFT) | cg 1853 drivers/clk/tegra/clk-dfll.c ok &= read_dt_param(td, "nvidia,cg", &td->cg); cg 113 drivers/gpio/gpio-crystalcove.c static void crystalcove_update_irq_mask(struct crystalcove_gpio *cg, cg 119 drivers/gpio/gpio-crystalcove.c if (cg->set_irq_mask) cg 120 drivers/gpio/gpio-crystalcove.c regmap_update_bits(cg->regmap, mirqs0, mask, mask); cg 122 drivers/gpio/gpio-crystalcove.c regmap_update_bits(cg->regmap, mirqs0, mask, 0); cg 125 drivers/gpio/gpio-crystalcove.c static void crystalcove_update_irq_ctrl(struct crystalcove_gpio *cg, int gpio) cg 129 drivers/gpio/gpio-crystalcove.c regmap_update_bits(cg->regmap, reg, CTLI_INTCNT_BE, cg->intcnt_value); cg 134 drivers/gpio/gpio-crystalcove.c struct crystalcove_gpio *cg = gpiochip_get_data(chip); cg 140 drivers/gpio/gpio-crystalcove.c return regmap_write(cg->regmap, reg, CTLO_INPUT_SET); cg 146 drivers/gpio/gpio-crystalcove.c struct crystalcove_gpio *cg = gpiochip_get_data(chip); cg 152 drivers/gpio/gpio-crystalcove.c return regmap_write(cg->regmap, reg, CTLO_OUTPUT_SET | value); cg 157 drivers/gpio/gpio-crystalcove.c struct crystalcove_gpio *cg = gpiochip_get_data(chip); cg 164 drivers/gpio/gpio-crystalcove.c ret = regmap_read(cg->regmap, reg, &val); cg 174 drivers/gpio/gpio-crystalcove.c struct crystalcove_gpio *cg = gpiochip_get_data(chip); cg 181 drivers/gpio/gpio-crystalcove.c regmap_update_bits(cg->regmap, reg, 1, 1); cg 183 drivers/gpio/gpio-crystalcove.c regmap_update_bits(cg->regmap, reg, 1, 0); cg 188 drivers/gpio/gpio-crystalcove.c struct crystalcove_gpio *cg = cg 196 drivers/gpio/gpio-crystalcove.c cg->intcnt_value = CTLI_INTCNT_DIS; cg 199 drivers/gpio/gpio-crystalcove.c cg->intcnt_value = CTLI_INTCNT_BE; cg 202 drivers/gpio/gpio-crystalcove.c cg->intcnt_value = CTLI_INTCNT_PE; cg 205 drivers/gpio/gpio-crystalcove.c cg->intcnt_value = CTLI_INTCNT_NE; cg 211 drivers/gpio/gpio-crystalcove.c cg->update |= UPDATE_IRQ_TYPE; cg 218 drivers/gpio/gpio-crystalcove.c struct crystalcove_gpio *cg = cg 221 drivers/gpio/gpio-crystalcove.c mutex_lock(&cg->buslock); cg 226 drivers/gpio/gpio-crystalcove.c struct crystalcove_gpio *cg = cg 230 drivers/gpio/gpio-crystalcove.c if (cg->update & UPDATE_IRQ_TYPE) cg 231 drivers/gpio/gpio-crystalcove.c crystalcove_update_irq_ctrl(cg, gpio); cg 232 drivers/gpio/gpio-crystalcove.c if (cg->update & UPDATE_IRQ_MASK) cg 233 drivers/gpio/gpio-crystalcove.c crystalcove_update_irq_mask(cg, gpio); cg 234 drivers/gpio/gpio-crystalcove.c cg->update = 0; cg 236 drivers/gpio/gpio-crystalcove.c mutex_unlock(&cg->buslock); cg 241 drivers/gpio/gpio-crystalcove.c struct crystalcove_gpio *cg = cg 245 drivers/gpio/gpio-crystalcove.c cg->set_irq_mask = false; cg 246 drivers/gpio/gpio-crystalcove.c cg->update |= UPDATE_IRQ_MASK; cg 252 drivers/gpio/gpio-crystalcove.c struct crystalcove_gpio *cg = cg 256 drivers/gpio/gpio-crystalcove.c cg->set_irq_mask = true; cg 257 drivers/gpio/gpio-crystalcove.c cg->update |= UPDATE_IRQ_MASK; cg 273 drivers/gpio/gpio-crystalcove.c struct crystalcove_gpio *cg = data; cg 279 drivers/gpio/gpio-crystalcove.c if (regmap_read(cg->regmap, GPIO0IRQ, &p0) || cg 280 drivers/gpio/gpio-crystalcove.c regmap_read(cg->regmap, GPIO1IRQ, &p1)) cg 283 drivers/gpio/gpio-crystalcove.c regmap_write(cg->regmap, GPIO0IRQ, p0); cg 284 drivers/gpio/gpio-crystalcove.c regmap_write(cg->regmap, GPIO1IRQ, p1); cg 289 drivers/gpio/gpio-crystalcove.c virq = irq_find_mapping(cg->chip.irq.domain, gpio); cg 299 drivers/gpio/gpio-crystalcove.c struct crystalcove_gpio *cg = gpiochip_get_data(chip); cg 304 drivers/gpio/gpio-crystalcove.c regmap_read(cg->regmap, to_reg(gpio, CTRL_OUT), &ctlo); cg 305 drivers/gpio/gpio-crystalcove.c regmap_read(cg->regmap, to_reg(gpio, CTRL_IN), &ctli); cg 306 drivers/gpio/gpio-crystalcove.c regmap_read(cg->regmap, gpio < 8 ? MGPIO0IRQS0 : MGPIO1IRQS0, cg 308 drivers/gpio/gpio-crystalcove.c regmap_read(cg->regmap, gpio < 8 ? MGPIO0IRQSX : MGPIO1IRQSX, cg 310 drivers/gpio/gpio-crystalcove.c regmap_read(cg->regmap, gpio < 8 ? GPIO0IRQ : GPIO1IRQ, cg 329 drivers/gpio/gpio-crystalcove.c struct crystalcove_gpio *cg; cg 337 drivers/gpio/gpio-crystalcove.c cg = devm_kzalloc(&pdev->dev, sizeof(*cg), GFP_KERNEL); cg 338 drivers/gpio/gpio-crystalcove.c if (!cg) cg 341 drivers/gpio/gpio-crystalcove.c platform_set_drvdata(pdev, cg); cg 343 drivers/gpio/gpio-crystalcove.c mutex_init(&cg->buslock); cg 344 drivers/gpio/gpio-crystalcove.c cg->chip.label = KBUILD_MODNAME; cg 345 drivers/gpio/gpio-crystalcove.c cg->chip.direction_input = crystalcove_gpio_dir_in; cg 346 drivers/gpio/gpio-crystalcove.c cg->chip.direction_output = crystalcove_gpio_dir_out; cg 347 drivers/gpio/gpio-crystalcove.c cg->chip.get = crystalcove_gpio_get; cg 348 drivers/gpio/gpio-crystalcove.c cg->chip.set = crystalcove_gpio_set; cg 349 drivers/gpio/gpio-crystalcove.c cg->chip.base = -1; cg 350 drivers/gpio/gpio-crystalcove.c cg->chip.ngpio = CRYSTALCOVE_VGPIO_NUM; cg 351 drivers/gpio/gpio-crystalcove.c cg->chip.can_sleep = true; cg 352 drivers/gpio/gpio-crystalcove.c cg->chip.parent = dev; cg 353 drivers/gpio/gpio-crystalcove.c cg->chip.dbg_show = crystalcove_gpio_dbg_show; cg 354 drivers/gpio/gpio-crystalcove.c cg->regmap = pmic->regmap; cg 356 drivers/gpio/gpio-crystalcove.c retval = devm_gpiochip_add_data(&pdev->dev, &cg->chip, cg); cg 362 drivers/gpio/gpio-crystalcove.c gpiochip_irqchip_add_nested(&cg->chip, &crystalcove_irqchip, 0, cg 366 drivers/gpio/gpio-crystalcove.c IRQF_ONESHOT, KBUILD_MODNAME, cg); cg 373 drivers/gpio/gpio-crystalcove.c gpiochip_set_nested_irqchip(&cg->chip, &crystalcove_irqchip, irq); cg 380 drivers/gpio/gpio-crystalcove.c struct crystalcove_gpio *cg = platform_get_drvdata(pdev); cg 384 drivers/gpio/gpio-crystalcove.c free_irq(irq, cg); cg 41 drivers/infiniband/core/cgroup.c return rdmacg_try_charge(&cg_obj->cg, &device->cg_device, cg 50 drivers/infiniband/core/cgroup.c rdmacg_uncharge(cg_obj->cg, &device->cg_device, cg 647 drivers/staging/media/ipu3/include/intel-ipu3.h __u32 cg:5; cg 104 drivers/video/fbdev/offb.c u32 cg = green >> (16 - info->var.green.length); cg 112 drivers/video/fbdev/offb.c (cg << info->var.green.offset) | cg 49 drivers/video/fbdev/simplefb.c u32 cg = green >> (16 - info->var.green.length); cg 57 drivers/video/fbdev/simplefb.c (cg << info->var.green.offset) | cg 133 fs/ufs/cylinder.c unsigned cg, i, j; cg 175 fs/ufs/cylinder.c cg = sbi->s_cgno[i]; cg 181 fs/ufs/cylinder.c sbi->s_cgno[0] = cg; cg 64 fs/ufs/ialloc.c unsigned ino, cg, bit; cg 81 fs/ufs/ialloc.c cg = ufs_inotocg (ino); cg 83 fs/ufs/ialloc.c ucpi = ufs_load_cylinder (sb, cg); cg 104 fs/ufs/ialloc.c fs32_add(sb, &UFS_SB(sb)->fs_cs(cg).cs_nifree, 1); cg 109 fs/ufs/ialloc.c fs32_sub(sb, &UFS_SB(sb)->fs_cs(cg).cs_ndir, 1); cg 181 fs/ufs/ialloc.c unsigned cg, bit, i, j, start; cg 205 fs/ufs/ialloc.c cg = i; cg 217 fs/ufs/ialloc.c cg = i; cg 231 fs/ufs/ialloc.c cg = i; cg 239 fs/ufs/ialloc.c ucpi = ufs_load_cylinder (sb, cg); cg 254 fs/ufs/ialloc.c "cylinder group %u corrupted - error in inode bitmap\n", cg); cg 278 fs/ufs/ialloc.c fs32_sub(sb, &sbi->fs_cs(cg).cs_nifree, 1); cg 283 fs/ufs/ialloc.c fs32_add(sb, &sbi->fs_cs(cg).cs_ndir, 1); cg 291 fs/ufs/ialloc.c inode->i_ino = cg * uspi->s_ipg + bit; cg 230 fs/ufs/super.c struct ufs_cylinder_group *cg) cg 234 fs/ufs/super.c pr_debug(" magic: %x\n", fs32_to_cpu(sb, cg->cg_magic)); cg 235 fs/ufs/super.c pr_debug(" time: %u\n", fs32_to_cpu(sb, cg->cg_time)); cg 236 fs/ufs/super.c pr_debug(" cgx: %u\n", fs32_to_cpu(sb, cg->cg_cgx)); cg 237 fs/ufs/super.c pr_debug(" ncyl: %u\n", fs16_to_cpu(sb, cg->cg_ncyl)); cg 238 fs/ufs/super.c pr_debug(" niblk: %u\n", fs16_to_cpu(sb, cg->cg_niblk)); cg 239 fs/ufs/super.c pr_debug(" ndblk: %u\n", fs32_to_cpu(sb, cg->cg_ndblk)); cg 240 fs/ufs/super.c pr_debug(" cs_ndir: %u\n", fs32_to_cpu(sb, cg->cg_cs.cs_ndir)); cg 241 fs/ufs/super.c pr_debug(" cs_nbfree: %u\n", fs32_to_cpu(sb, cg->cg_cs.cs_nbfree)); cg 242 fs/ufs/super.c pr_debug(" cs_nifree: %u\n", fs32_to_cpu(sb, cg->cg_cs.cs_nifree)); cg 243 fs/ufs/super.c pr_debug(" cs_nffree: %u\n", fs32_to_cpu(sb, cg->cg_cs.cs_nffree)); cg 244 fs/ufs/super.c pr_debug(" rotor: %u\n", fs32_to_cpu(sb, cg->cg_rotor)); cg 245 fs/ufs/super.c pr_debug(" frotor: %u\n", fs32_to_cpu(sb, cg->cg_frotor)); cg 246 fs/ufs/super.c pr_debug(" irotor: %u\n", fs32_to_cpu(sb, cg->cg_irotor)); cg 248 fs/ufs/super.c fs32_to_cpu(sb, cg->cg_frsum[0]), fs32_to_cpu(sb, cg->cg_frsum[1]), cg 249 fs/ufs/super.c fs32_to_cpu(sb, cg->cg_frsum[2]), fs32_to_cpu(sb, cg->cg_frsum[3]), cg 250 fs/ufs/super.c fs32_to_cpu(sb, cg->cg_frsum[4]), fs32_to_cpu(sb, cg->cg_frsum[5]), cg 251 fs/ufs/super.c fs32_to_cpu(sb, cg->cg_frsum[6]), fs32_to_cpu(sb, cg->cg_frsum[7])); cg 252 fs/ufs/super.c pr_debug(" btotoff: %u\n", fs32_to_cpu(sb, cg->cg_btotoff)); cg 253 fs/ufs/super.c pr_debug(" boff: %u\n", fs32_to_cpu(sb, cg->cg_boff)); cg 254 fs/ufs/super.c pr_debug(" iuseoff: %u\n", fs32_to_cpu(sb, cg->cg_iusedoff)); cg 255 fs/ufs/super.c pr_debug(" freeoff: %u\n", fs32_to_cpu(sb, cg->cg_freeoff)); cg 256 fs/ufs/super.c pr_debug(" nextfreeoff: %u\n", fs32_to_cpu(sb, cg->cg_nextfreeoff)); cg 258 fs/ufs/super.c fs32_to_cpu(sb, cg->cg_u.cg_44.cg_clustersumoff)); cg 260 fs/ufs/super.c fs32_to_cpu(sb, cg->cg_u.cg_44.cg_clusteroff)); cg 262 fs/ufs/super.c fs32_to_cpu(sb, cg->cg_u.cg_44.cg_nclusterblks)); cg 267 fs/ufs/super.c # define ufs_print_cylinder_stuff(sb, cg) /**/ cg 52 include/linux/blktrace_api.h #define blk_add_cgroup_trace_msg(q, cg, fmt, ...) \ cg 59 include/linux/blktrace_api.h __trace_note_message(bt, cg, fmt, ##__VA_ARGS__);\ cg 98 include/linux/blktrace_api.h # define blk_add_cgroup_trace_msg(q, cg, fmt, ...) do { } while (0) cg 46 include/linux/cgroup_rdma.h void rdmacg_uncharge(struct rdma_cgroup *cg, cg 1453 include/rdma/ib_verbs.h struct rdma_cgroup *cg; /* owner rdma cgroup */ cg 72 kernel/cgroup/rdma.c static struct rdma_cgroup *parent_rdmacg(struct rdma_cgroup *cg) cg 74 kernel/cgroup/rdma.c return css_rdmacg(cg->css.parent); cg 113 kernel/cgroup/rdma.c find_cg_rpool_locked(struct rdma_cgroup *cg, cg 121 kernel/cgroup/rdma.c list_for_each_entry(pool, &cg->rpools, cg_node) cg 129 kernel/cgroup/rdma.c get_cg_rpool_locked(struct rdma_cgroup *cg, struct rdmacg_device *device) cg 133 kernel/cgroup/rdma.c rpool = find_cg_rpool_locked(cg, device); cg 146 kernel/cgroup/rdma.c list_add_tail(&rpool->cg_node, &cg->rpools); cg 162 kernel/cgroup/rdma.c uncharge_cg_locked(struct rdma_cgroup *cg, cg 168 kernel/cgroup/rdma.c rpool = find_cg_rpool_locked(cg, device); cg 176 kernel/cgroup/rdma.c pr_warn("Invalid device %p or rdma cgroup %p\n", cg, device); cg 205 kernel/cgroup/rdma.c static void rdmacg_uncharge_hierarchy(struct rdma_cgroup *cg, cg 214 kernel/cgroup/rdma.c for (p = cg; p != stop_cg; p = parent_rdmacg(p)) cg 219 kernel/cgroup/rdma.c css_put(&cg->css); cg 227 kernel/cgroup/rdma.c void rdmacg_uncharge(struct rdma_cgroup *cg, cg 234 kernel/cgroup/rdma.c rdmacg_uncharge_hierarchy(cg, device, NULL, index); cg 263 kernel/cgroup/rdma.c struct rdma_cgroup *cg, *p; cg 275 kernel/cgroup/rdma.c cg = get_current_rdmacg(); cg 278 kernel/cgroup/rdma.c for (p = cg; p; p = parent_rdmacg(p)) { cg 296 kernel/cgroup/rdma.c *rdmacg = cg; cg 301 kernel/cgroup/rdma.c rdmacg_uncharge_hierarchy(cg, device, p, index); cg 428 kernel/cgroup/rdma.c struct rdma_cgroup *cg = css_rdmacg(of_css(of)); cg 463 kernel/cgroup/rdma.c rpool = get_cg_rpool_locked(cg, device); cg 528 kernel/cgroup/rdma.c struct rdma_cgroup *cg = css_rdmacg(seq_css(sf)); cg 535 kernel/cgroup/rdma.c rpool = find_cg_rpool_locked(cg, device); cg 565 kernel/cgroup/rdma.c struct rdma_cgroup *cg; cg 567 kernel/cgroup/rdma.c cg = kzalloc(sizeof(*cg), GFP_KERNEL); cg 568 kernel/cgroup/rdma.c if (!cg) cg 571 kernel/cgroup/rdma.c INIT_LIST_HEAD(&cg->rpools); cg 572 kernel/cgroup/rdma.c return &cg->css; cg 577 kernel/cgroup/rdma.c struct rdma_cgroup *cg = css_rdmacg(css); cg 579 kernel/cgroup/rdma.c kfree(cg); cg 593 kernel/cgroup/rdma.c struct rdma_cgroup *cg = css_rdmacg(css); cg 598 kernel/cgroup/rdma.c list_for_each_entry(rpool, &cg->rpools, cg_node) cg 63 samples/vfio-mdev/mdpy-fb.c u32 cg = green >> (16 - info->var.green.length); cg 71 samples/vfio-mdev/mdpy-fb.c (cg << info->var.green.offset) | cg 464 tools/testing/selftests/bpf/test_cgroup_attach.c int cg = 0, i, rc = -1; cg 478 tools/testing/selftests/bpf/test_cgroup_attach.c cg = create_and_get_cgroup("/cg_autodetach"); cg 479 tools/testing/selftests/bpf/test_cgroup_attach.c if (cg < 0) cg 486 tools/testing/selftests/bpf/test_cgroup_attach.c if (bpf_prog_attach(allow_prog[i], cg, BPF_CGROUP_INET_EGRESS, cg 494 tools/testing/selftests/bpf/test_cgroup_attach.c assert(bpf_prog_query(cg, BPF_CGROUP_INET_EGRESS, 0, &attach_flags, cg 509 tools/testing/selftests/bpf/test_cgroup_attach.c close(cg); cg 510 tools/testing/selftests/bpf/test_cgroup_attach.c cg = 0; cg 540 tools/testing/selftests/bpf/test_cgroup_attach.c if (cg) cg 541 tools/testing/selftests/bpf/test_cgroup_attach.c close(cg);