cfgr 407 drivers/net/ethernet/freescale/enetc/enetc_pf.c u32 cfgr; cfgr 412 drivers/net/ethernet/freescale/enetc/enetc_pf.c cfgr = enetc_port_rd(&priv->si->hw, ENETC_PSICFGR0(vf + 1)); cfgr 413 drivers/net/ethernet/freescale/enetc/enetc_pf.c cfgr = (cfgr & ~ENETC_PSICFGR0_ASE) | (en ? ENETC_PSICFGR0_ASE : 0); cfgr 414 drivers/net/ethernet/freescale/enetc/enetc_pf.c enetc_port_wr(&priv->si->hw, ENETC_PSICFGR0(vf + 1), cfgr); cfgr 1048 drivers/net/ethernet/freescale/fec_main.c u32 cfgr; cfgr 1059 drivers/net/ethernet/freescale/fec_main.c cfgr = (fep->phy_interface == PHY_INTERFACE_MODE_RMII) cfgr 1062 drivers/net/ethernet/freescale/fec_main.c cfgr |= BM_MIIGSK_CFGR_FRCONT_10M; cfgr 1063 drivers/net/ethernet/freescale/fec_main.c writel(cfgr, fep->hwp + FEC_MIIGSK_CFGR); cfgr 1825 drivers/net/wireless/cisco/airo.c ConfigRid cfgr; cfgr 1833 drivers/net/wireless/cisco/airo.c cfgr = ai->config; cfgr 1835 drivers/net/wireless/cisco/airo.c if ((cfgr.opmode & MODE_CFG_MASK) == MODE_STA_IBSS) cfgr 1840 drivers/net/wireless/cisco/airo.c return PC4500_writerid( ai, RID_CONFIG, &cfgr, sizeof(cfgr), lock); cfgr 731 drivers/perf/arm_smmuv3_pmu.c u32 cfgr, reg_size; cfgr 763 drivers/perf/arm_smmuv3_pmu.c cfgr = readl_relaxed(smmu_pmu->reg_base + SMMU_PMCG_CFGR); cfgr 766 drivers/perf/arm_smmuv3_pmu.c if (cfgr & SMMU_PMCG_CFGR_RELOC_CTRS) { cfgr 784 drivers/perf/arm_smmuv3_pmu.c smmu_pmu->num_counters = FIELD_GET(SMMU_PMCG_CFGR_NCTR, cfgr) + 1; cfgr 786 drivers/perf/arm_smmuv3_pmu.c smmu_pmu->global_filter = !!(cfgr & SMMU_PMCG_CFGR_SID_FILTER_TYPE); cfgr 788 drivers/perf/arm_smmuv3_pmu.c reg_size = FIELD_GET(SMMU_PMCG_CFGR_SIZE, cfgr); cfgr 128 drivers/pinctrl/pinctrl-at91-pio4.c u32 cfgr[ATMEL_PIO_NPINS_PER_BANK]; cfgr 880 drivers/pinctrl/pinctrl-at91-pio4.c atmel_pioctrl->pm_suspend_backup[i].cfgr[j] = cfgr 903 drivers/pinctrl/pinctrl-at91-pio4.c atmel_pioctrl->pm_suspend_backup[i].cfgr[j]); cfgr 40 drivers/pwm/pwm-stm32-lp.c u32 val, mask, cfgr, presc = 0; cfgr 90 drivers/pwm/pwm-stm32-lp.c ret = regmap_read(priv->regmap, STM32_LPTIM_CFGR, &cfgr); cfgr 94 drivers/pwm/pwm-stm32-lp.c if ((FIELD_GET(STM32_LPTIM_PRESC, cfgr) != presc) || cfgr 95 drivers/pwm/pwm-stm32-lp.c (FIELD_GET(STM32_LPTIM_WAVPOL, cfgr) != state->polarity)) { cfgr 507 sound/soc/stm/stm32_i2s.c u32 cfgr, cfgr_mask, cfg1; cfgr 513 sound/soc/stm/stm32_i2s.c cfgr = I2S_CGFR_DATLEN_SET(I2S_I2SMOD_DATLEN_16); cfgr 517 sound/soc/stm/stm32_i2s.c cfgr = I2S_CGFR_DATLEN_SET(I2S_I2SMOD_DATLEN_32) | cfgr 527 sound/soc/stm/stm32_i2s.c cfgr |= I2S_CGFR_I2SCFG_SET(I2S_I2SMOD_FD_SLAVE); cfgr 530 sound/soc/stm/stm32_i2s.c cfgr |= I2S_CGFR_FIXCH; cfgr 533 sound/soc/stm/stm32_i2s.c cfgr |= I2S_CGFR_I2SCFG_SET(I2S_I2SMOD_FD_MASTER); cfgr 538 sound/soc/stm/stm32_i2s.c cfgr_mask, cfgr);