cfgopt 94 drivers/gpu/drm/nouveau/include/nvkm/core/device.h const char *cfgopt; cfgopt 180 drivers/gpu/drm/nouveau/nvkm/core/engine.c if (!nvkm_boolopt(device->cfgopt, nvkm_subdev_name[index], enable)) { cfgopt 2909 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c device->cfgopt = cfg; cfgopt 2944 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c chipset = nvkm_longopt(device->cfgopt, "NvChipset", 0); cfgopt 2010 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c reset = nvkm_boolopt(device->cfgopt, "NvGrResetWar", reset); cfgopt 2166 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c gr->firmware = nvkm_boolopt(device->cfgopt, "NvGrUseFW", cfgopt 493 drivers/gpu/drm/nouveau/nvkm/engine/pm/base.c const bool all = nvkm_boolopt(device->cfgopt, "NvPmShowAll", false); cfgopt 494 drivers/gpu/drm/nouveau/nvkm/engine/pm/base.c const bool raw = nvkm_boolopt(device->cfgopt, "NvPmUnnamed", all); cfgopt 171 drivers/gpu/drm/nouveau/nvkm/subdev/bar/gf100.c bar->bar2_halve = nvkm_boolopt(device->cfgopt, "NvBar2Halve", false); cfgopt 186 drivers/gpu/drm/nouveau/nvkm/subdev/bios/shadow.c optarg = nvkm_stropt(device->cfgopt, "NvBios", &optlen); cfgopt 698 drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c mode = nvkm_stropt(device->cfgopt, "NvClkMode", &arglen); cfgopt 704 drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c mode = nvkm_stropt(device->cfgopt, "NvClkModeAC", &arglen); cfgopt 708 drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c mode = nvkm_stropt(device->cfgopt, "NvClkModeDC", &arglen); cfgopt 712 drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c clk->boost_mode = nvkm_longopt(device->cfgopt, "NvBoost", cfgopt 135 drivers/gpu/drm/nouveau/nvkm/subdev/devinit/base.c init->force_post = nvkm_boolopt(device->cfgopt, "NvForcePost", false); cfgopt 195 drivers/gpu/drm/nouveau/nvkm/subdev/fb/base.c fb->page = nvkm_longopt(device->cfgopt, "NvFbBigPage", cfgopt 51 drivers/gpu/drm/nouveau/nvkm/subdev/fb/gf100.c size = nvkm_longopt(device->cfgopt, "MmuDebugBufferSize", size); cfgopt 411 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgf100.c ram_exec(&ram->fuc, nvkm_boolopt(device->cfgopt, "NvMemExec", true)); cfgopt 1238 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgk104.c if (!nvkm_boolopt(device->cfgopt, "NvMemExec", true)) { cfgopt 170 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgt215.c if (nvkm_boolopt(device->cfgopt, "NvMemExec", true) != true) cfgopt 888 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgt215.c bool exec = nvkm_boolopt(device->cfgopt, "NvMemExec", true); cfgopt 485 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv50.c ram_exec(&ram->hwsq, nvkm_boolopt(device->cfgopt, "NvMemExec", true)); cfgopt 203 drivers/gpu/drm/nouveau/nvkm/subdev/gpio/base.c if (nvkm_boolopt(subdev->device->cfgopt, "NvPowerChecks", true)) { cfgopt 234 drivers/gpu/drm/nouveau/nvkm/subdev/i2c/bus.c !nvkm_boolopt(device->cfgopt, "NvI2C", internal)) { cfgopt 42 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/gp100.c if (!nvkm_boolopt(device->cfgopt, "GP100MmuLayout", true)) cfgopt 42 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/gp10b.c if (!nvkm_boolopt(device->cfgopt, "GP100MmuLayout", true)) cfgopt 53 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/nv41.c !nvkm_boolopt(device->cfgopt, "NvPCIE", true)) cfgopt 68 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/nv44.c !nvkm_boolopt(device->cfgopt, "NvPCIE", true)) cfgopt 275 drivers/gpu/drm/nouveau/nvkm/subdev/mxm/base.c if (nvkm_boolopt(device->cfgopt, "NvMXMDCB", true)) cfgopt 122 drivers/gpu/drm/nouveau/nvkm/subdev/pci/agp.c mode = nvkm_longopt(device->cfgopt, "NvAGP", mode); cfgopt 222 drivers/gpu/drm/nouveau/nvkm/subdev/pci/base.c pci->msi = nvkm_boolopt(device->cfgopt, "NvMSI", pci->msi); cfgopt 84 drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk104.c if (nvkm_boolopt(device->cfgopt, "War00C800_0", true)) { cfgopt 440 drivers/gpu/drm/nouveau/nvkm/subdev/therm/base.c therm->clkgating_enabled = nvkm_boolopt(device->cfgopt, cfgopt 95 drivers/gpu/drm/nouveau/nvkm/subdev/therm/fanpwm.c if (!nvkm_boolopt(device->cfgopt, "NvFanPWM", func->param) ||