cfglo              18 drivers/dma/dw/dw.c 	u32 cfglo = DWC_CFGL_CH_PRIOR(dwc->priority);
cfglo              26 drivers/dma/dw/dw.c 	cfglo |= hs_polarity ? DWC_CFGL_HS_DST_POL | DWC_CFGL_HS_SRC_POL : 0;
cfglo              28 drivers/dma/dw/dw.c 	channel_writel(dwc, CFG_LO, cfglo);
cfglo              34 drivers/dma/dw/dw.c 	u32 cfglo = channel_readl(dwc, CFG_LO);
cfglo              36 drivers/dma/dw/dw.c 	channel_writel(dwc, CFG_LO, cfglo | DWC_CFGL_CH_SUSP);
cfglo              41 drivers/dma/dw/dw.c 	u32 cfglo = channel_readl(dwc, CFG_LO);
cfglo              43 drivers/dma/dw/dw.c 	channel_writel(dwc, CFG_LO, cfglo & ~DWC_CFGL_CH_SUSP);
cfglo              15 drivers/dma/dw/idma32.c 	u32 cfglo = 0;
cfglo              18 drivers/dma/dw/idma32.c 	cfglo |= IDMA32C_CFGL_DST_BURST_ALIGN | IDMA32C_CFGL_SRC_BURST_ALIGN;
cfglo              28 drivers/dma/dw/idma32.c 	channel_writel(dwc, CFG_LO, cfglo);
cfglo              34 drivers/dma/dw/idma32.c 	u32 cfglo = channel_readl(dwc, CFG_LO);
cfglo              37 drivers/dma/dw/idma32.c 		cfglo |= IDMA32C_CFGL_CH_DRAIN;
cfglo              39 drivers/dma/dw/idma32.c 	channel_writel(dwc, CFG_LO, cfglo | DWC_CFGL_CH_SUSP);
cfglo              44 drivers/dma/dw/idma32.c 	u32 cfglo = channel_readl(dwc, CFG_LO);
cfglo              47 drivers/dma/dw/idma32.c 		cfglo &= ~IDMA32C_CFGL_CH_DRAIN;
cfglo              49 drivers/dma/dw/idma32.c 	channel_writel(dwc, CFG_LO, cfglo & ~DWC_CFGL_CH_SUSP);
cfglo              62 drivers/dma/idma64.c 	u32 cfglo = 0;
cfglo              65 drivers/dma/idma64.c 	cfglo |= IDMA64C_CFGL_DST_BURST_ALIGN | IDMA64C_CFGL_SRC_BURST_ALIGN;
cfglo              67 drivers/dma/idma64.c 	channel_writel(idma64c, CFG_LO, cfglo);
cfglo             417 drivers/dma/idma64.c 	u32 cfglo;
cfglo             419 drivers/dma/idma64.c 	cfglo = channel_readl(idma64c, CFG_LO);
cfglo             421 drivers/dma/idma64.c 		cfglo |= IDMA64C_CFGL_CH_DRAIN;
cfglo             423 drivers/dma/idma64.c 		cfglo &= ~IDMA64C_CFGL_CH_DRAIN;
cfglo             425 drivers/dma/idma64.c 	channel_writel(idma64c, CFG_LO, cfglo | IDMA64C_CFGL_CH_SUSP);
cfglo             428 drivers/dma/idma64.c 		cfglo = channel_readl(idma64c, CFG_LO);
cfglo             429 drivers/dma/idma64.c 	} while (!(cfglo & IDMA64C_CFGL_FIFO_EMPTY) && --count);
cfglo             434 drivers/dma/idma64.c 	u32 cfglo;
cfglo             436 drivers/dma/idma64.c 	cfglo = channel_readl(idma64c, CFG_LO);
cfglo             437 drivers/dma/idma64.c 	channel_writel(idma64c, CFG_LO, cfglo & ~IDMA64C_CFGL_CH_SUSP);