cfg_hnd           113 drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.h const struct mdp5_cfg_hw *mdp5_cfg_get_hw_config(struct mdp5_cfg_handler *cfg_hnd);
cfg_hnd           114 drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.h struct mdp5_cfg *mdp5_cfg_get_config(struct mdp5_cfg_handler *cfg_hnd);
cfg_hnd           115 drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.h int mdp5_cfg_get_hw_rev(struct mdp5_cfg_handler *cfg_hnd);
cfg_hnd           123 drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.h void mdp5_cfg_destroy(struct mdp5_cfg_handler *cfg_hnd);
cfg_hnd           681 drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c 		void __iomem *mmio_base, struct mdp5_cfg_handler *cfg_hnd)
cfg_hnd           684 drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c 	const struct mdp5_cfg_hw *hw_cfg = mdp5_cfg_get_hw_config(cfg_hnd);
cfg_hnd           685 drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c 	int rev = mdp5_cfg_get_hw_rev(cfg_hnd);
cfg_hnd            18 drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.h 		void __iomem *mmio_base, struct mdp5_cfg_handler *cfg_hnd);
cfg_hnd           208 drivers/gpu/drm/msm/dsi/dsi_cfg.c 	const struct msm_dsi_cfg_handler *cfg_hnd = NULL;
cfg_hnd           214 drivers/gpu/drm/msm/dsi/dsi_cfg.c 			cfg_hnd = &dsi_cfg_handlers[i];
cfg_hnd           219 drivers/gpu/drm/msm/dsi/dsi_cfg.c 	return cfg_hnd;
cfg_hnd           128 drivers/gpu/drm/msm/dsi/dsi_host.c 	const struct msm_dsi_cfg_handler *cfg_hnd;
cfg_hnd           201 drivers/gpu/drm/msm/dsi/dsi_host.c 	const struct msm_dsi_cfg_handler *cfg_hnd = NULL;
cfg_hnd           240 drivers/gpu/drm/msm/dsi/dsi_host.c 	cfg_hnd = msm_dsi_cfg_get(major, minor);
cfg_hnd           252 drivers/gpu/drm/msm/dsi/dsi_host.c 	return cfg_hnd;
cfg_hnd           263 drivers/gpu/drm/msm/dsi/dsi_host.c 	const struct dsi_reg_entry *regs = msm_host->cfg_hnd->cfg->reg_cfg.regs;
cfg_hnd           264 drivers/gpu/drm/msm/dsi/dsi_host.c 	int num = msm_host->cfg_hnd->cfg->reg_cfg.num;
cfg_hnd           279 drivers/gpu/drm/msm/dsi/dsi_host.c 	const struct dsi_reg_entry *regs = msm_host->cfg_hnd->cfg->reg_cfg.regs;
cfg_hnd           280 drivers/gpu/drm/msm/dsi/dsi_host.c 	int num = msm_host->cfg_hnd->cfg->reg_cfg.num;
cfg_hnd           313 drivers/gpu/drm/msm/dsi/dsi_host.c 	const struct dsi_reg_entry *regs = msm_host->cfg_hnd->cfg->reg_cfg.regs;
cfg_hnd           314 drivers/gpu/drm/msm/dsi/dsi_host.c 	int num = msm_host->cfg_hnd->cfg->reg_cfg.num;
cfg_hnd           381 drivers/gpu/drm/msm/dsi/dsi_host.c 	const struct msm_dsi_cfg_handler *cfg_hnd = msm_host->cfg_hnd;
cfg_hnd           382 drivers/gpu/drm/msm/dsi/dsi_host.c 	const struct msm_dsi_config *cfg = cfg_hnd->cfg;
cfg_hnd           439 drivers/gpu/drm/msm/dsi/dsi_host.c 	if (cfg_hnd->ops->clk_init_ver)
cfg_hnd           440 drivers/gpu/drm/msm/dsi/dsi_host.c 		ret = cfg_hnd->ops->clk_init_ver(msm_host);
cfg_hnd           447 drivers/gpu/drm/msm/dsi/dsi_host.c 	const struct msm_dsi_config *cfg = msm_host->cfg_hnd->cfg;
cfg_hnd           471 drivers/gpu/drm/msm/dsi/dsi_host.c 	const struct msm_dsi_config *cfg = msm_host->cfg_hnd->cfg;
cfg_hnd           487 drivers/gpu/drm/msm/dsi/dsi_host.c 	if (!msm_host->cfg_hnd)
cfg_hnd           502 drivers/gpu/drm/msm/dsi/dsi_host.c 	if (!msm_host->cfg_hnd)
cfg_hnd           820 drivers/gpu/drm/msm/dsi/dsi_host.c 	const struct msm_dsi_cfg_handler *cfg_hnd = msm_host->cfg_hnd;
cfg_hnd           874 drivers/gpu/drm/msm/dsi/dsi_host.c 	if ((cfg_hnd->major == MSM_DSI_VER_MAJOR_6G) &&
cfg_hnd           875 drivers/gpu/drm/msm/dsi/dsi_host.c 		(cfg_hnd->minor >= MSM_DSI_6G_VER_MINOR_V1_2))
cfg_hnd           883 drivers/gpu/drm/msm/dsi/dsi_host.c 	if ((cfg_hnd->major == MSM_DSI_VER_MAJOR_6G) &&
cfg_hnd           884 drivers/gpu/drm/msm/dsi/dsi_host.c 	    (cfg_hnd->minor > MSM_DSI_6G_VER_MINOR_V1_0) &&
cfg_hnd          1148 drivers/gpu/drm/msm/dsi/dsi_host.c 	const struct msm_dsi_cfg_handler *cfg_hnd = msm_host->cfg_hnd;
cfg_hnd          1166 drivers/gpu/drm/msm/dsi/dsi_host.c 	data = cfg_hnd->ops->tx_buf_get(msm_host);
cfg_hnd          1191 drivers/gpu/drm/msm/dsi/dsi_host.c 	if (cfg_hnd->ops->tx_buf_put)
cfg_hnd          1192 drivers/gpu/drm/msm/dsi/dsi_host.c 		cfg_hnd->ops->tx_buf_put(msm_host);
cfg_hnd          1262 drivers/gpu/drm/msm/dsi/dsi_host.c 	const struct msm_dsi_cfg_handler *cfg_hnd = msm_host->cfg_hnd;
cfg_hnd          1267 drivers/gpu/drm/msm/dsi/dsi_host.c 	ret = cfg_hnd->ops->dma_base_get(msm_host, &dma_base);
cfg_hnd          1782 drivers/gpu/drm/msm/dsi/dsi_host.c 	const struct msm_dsi_config *cfg = msm_host->cfg_hnd->cfg;
cfg_hnd          1830 drivers/gpu/drm/msm/dsi/dsi_host.c 	msm_host->cfg_hnd = dsi_get_config(msm_host);
cfg_hnd          1831 drivers/gpu/drm/msm/dsi/dsi_host.c 	if (!msm_host->cfg_hnd) {
cfg_hnd          1845 drivers/gpu/drm/msm/dsi/dsi_host.c 	msm_host->ctrl_base += msm_host->cfg_hnd->cfg->io_offset;
cfg_hnd          1908 drivers/gpu/drm/msm/dsi/dsi_host.c 	const struct msm_dsi_cfg_handler *cfg_hnd = msm_host->cfg_hnd;
cfg_hnd          1929 drivers/gpu/drm/msm/dsi/dsi_host.c 	ret = cfg_hnd->ops->tx_buf_alloc(msm_host, SZ_4K);
cfg_hnd          1987 drivers/gpu/drm/msm/dsi/dsi_host.c 	const struct msm_dsi_cfg_handler *cfg_hnd = msm_host->cfg_hnd;
cfg_hnd          2000 drivers/gpu/drm/msm/dsi/dsi_host.c 	cfg_hnd->ops->link_clk_enable(msm_host);
cfg_hnd          2021 drivers/gpu/drm/msm/dsi/dsi_host.c 	const struct msm_dsi_cfg_handler *cfg_hnd = msm_host->cfg_hnd;
cfg_hnd          2031 drivers/gpu/drm/msm/dsi/dsi_host.c 	cfg_hnd->ops->link_clk_disable(msm_host);
cfg_hnd          2047 drivers/gpu/drm/msm/dsi/dsi_host.c 	const struct msm_dsi_cfg_handler *cfg_hnd = msm_host->cfg_hnd;
cfg_hnd          2089 drivers/gpu/drm/msm/dsi/dsi_host.c 		if ((cfg_hnd->major == MSM_DSI_VER_MAJOR_6G) &&
cfg_hnd          2090 drivers/gpu/drm/msm/dsi/dsi_host.c 			(cfg_hnd->minor >= MSM_DSI_6G_VER_MINOR_V1_1)) {
cfg_hnd          2260 drivers/gpu/drm/msm/dsi/dsi_host.c 	const struct msm_dsi_cfg_handler *cfg_hnd = msm_host->cfg_hnd;
cfg_hnd          2263 drivers/gpu/drm/msm/dsi/dsi_host.c 	ret = cfg_hnd->ops->calc_clk_rate(msm_host, is_dual_dsi);
cfg_hnd          2329 drivers/gpu/drm/msm/dsi/dsi_host.c 	const struct msm_dsi_cfg_handler *cfg_hnd = msm_host->cfg_hnd;
cfg_hnd          2348 drivers/gpu/drm/msm/dsi/dsi_host.c 	ret = cfg_hnd->ops->link_clk_enable(msm_host);
cfg_hnd          2375 drivers/gpu/drm/msm/dsi/dsi_host.c 	cfg_hnd->ops->link_clk_disable(msm_host);
cfg_hnd          2387 drivers/gpu/drm/msm/dsi/dsi_host.c 	const struct msm_dsi_cfg_handler *cfg_hnd = msm_host->cfg_hnd;
cfg_hnd          2402 drivers/gpu/drm/msm/dsi/dsi_host.c 	cfg_hnd->ops->link_clk_disable(msm_host);