cfg_base 29 arch/mips/pci/ops-lantiq.c unsigned long cfg_base; cfg_base 41 arch/mips/pci/ops-lantiq.c cfg_base = (unsigned long) ltq_pci_mapped_cfg; cfg_base 42 arch/mips/pci/ops-lantiq.c cfg_base |= (bus->number << LTQ_PCI_CFG_BUSNUM_SHF) | (devfn << cfg_base 47 arch/mips/pci/ops-lantiq.c ltq_w32(swab32(*data), ((u32 *)cfg_base)); cfg_base 49 arch/mips/pci/ops-lantiq.c *data = ltq_r32(((u32 *)(cfg_base))); cfg_base 55 arch/mips/pci/ops-lantiq.c cfg_base = (unsigned long) ltq_pci_mapped_cfg; cfg_base 56 arch/mips/pci/ops-lantiq.c cfg_base |= (0x0 << LTQ_PCI_CFG_FUNNUM_SHF) + 4; cfg_base 57 arch/mips/pci/ops-lantiq.c temp = ltq_r32(((u32 *)(cfg_base))); cfg_base 59 arch/mips/pci/ops-lantiq.c cfg_base = (unsigned long) ltq_pci_mapped_cfg; cfg_base 60 arch/mips/pci/ops-lantiq.c cfg_base |= (0x68 << LTQ_PCI_CFG_FUNNUM_SHF) + 4; cfg_base 61 arch/mips/pci/ops-lantiq.c ltq_w32(temp, ((u32 *)cfg_base)); cfg_base 105 arch/mips/pci/pci-alchemy.c unsigned long offset, status, cfg_base, flags, entryLo0, entryLo1, r; cfg_base 130 arch/mips/pci/pci-alchemy.c cfg_base = (1 << device) << 11; cfg_base 132 arch/mips/pci/pci-alchemy.c cfg_base = 0x80000000 | (bus->number << 16) | (device << 11); cfg_base 137 arch/mips/pci/pci-alchemy.c offset |= cfg_base & ~PAGE_MASK; cfg_base 140 arch/mips/pci/pci-alchemy.c cfg_base = cfg_base & PAGE_MASK; cfg_base 145 arch/mips/pci/pci-alchemy.c entryLo0 = (6 << 26) | (cfg_base >> 6) | (2 << 3) | 7; cfg_base 146 arch/mips/pci/pci-alchemy.c entryLo1 = (6 << 26) | (cfg_base >> 6) | (0x1000 >> 6) | (2 << 3) | 7; cfg_base 49 arch/mips/pci/pci-ar71xx.c void __iomem *cfg_base; cfg_base 109 arch/mips/pci/pci-ar71xx.c void __iomem *base = apc->cfg_base; cfg_base 147 arch/mips/pci/pci-ar71xx.c void __iomem *base = apc->cfg_base; cfg_base 164 arch/mips/pci/pci-ar71xx.c void __iomem *base = apc->cfg_base; cfg_base 180 arch/mips/pci/pci-ar71xx.c void __iomem *base = apc->cfg_base; cfg_base 204 arch/mips/pci/pci-ar71xx.c void __iomem *base = apc->cfg_base; cfg_base 340 arch/mips/pci/pci-ar71xx.c apc->cfg_base = devm_ioremap_resource(&pdev->dev, res); cfg_base 341 arch/mips/pci/pci-ar71xx.c if (IS_ERR(apc->cfg_base)) cfg_base 342 arch/mips/pci/pci-ar71xx.c return PTR_ERR(apc->cfg_base); cfg_base 71 drivers/gpu/drm/i915/gvt/cfg_space.c u8 *cfg_base = vgpu_cfg_space(vgpu); cfg_base 77 drivers/gpu/drm/i915/gvt/cfg_space.c old = cfg_base[off + i]; cfg_base 88 drivers/gpu/drm/i915/gvt/cfg_space.c cfg_base[off + i] = (old & ~mask) | new; cfg_base 93 drivers/gpu/drm/i915/gvt/cfg_space.c memcpy(cfg_base + off + i, src + i, bytes - i); cfg_base 237 drivers/ide/trm290.c unsigned int cfg_base = pci_resource_start(dev, 4); cfg_base 241 drivers/ide/trm290.c if ((dev->class & 5) && cfg_base) cfg_base 244 drivers/ide/trm290.c cfg_base = 0x3df0; cfg_base 247 drivers/ide/trm290.c printk(KERN_CONT " config base at 0x%04x\n", cfg_base); cfg_base 248 drivers/ide/trm290.c hwif->config_data = cfg_base; cfg_base 249 drivers/ide/trm290.c hwif->dma_base = (cfg_base + 4) ^ (hwif->channel ? 0x80 : 0); cfg_base 35 drivers/net/can/sja1000/peak_pci.c void __iomem *cfg_base; /* Common for all channels */ cfg_base 142 drivers/net/can/sja1000/peak_pci.c void __iomem *cfg_base; /* Common for all channels */ cfg_base 160 drivers/net/can/sja1000/peak_pci.c u8 gp_outen = readb(card->cfg_base + PITA_GPOEN) & ~PITA_GPIN_SCL; cfg_base 161 drivers/net/can/sja1000/peak_pci.c writeb(gp_outen, card->cfg_base + PITA_GPOEN); cfg_base 166 drivers/net/can/sja1000/peak_pci.c u8 gp_outen = readb(card->cfg_base + PITA_GPOEN) & ~PITA_GPIN_SDA; cfg_base 167 drivers/net/can/sja1000/peak_pci.c writeb(gp_outen, card->cfg_base + PITA_GPOEN); cfg_base 183 drivers/net/can/sja1000/peak_pci.c gp_out = readb(card->cfg_base + PITA_GPOUT) & ~PITA_GPIN_SDA; cfg_base 184 drivers/net/can/sja1000/peak_pci.c writeb(gp_out, card->cfg_base + PITA_GPOUT); cfg_base 187 drivers/net/can/sja1000/peak_pci.c gp_outen = readb(card->cfg_base + PITA_GPOEN); cfg_base 193 drivers/net/can/sja1000/peak_pci.c writeb(gp_outen, card->cfg_base + PITA_GPOEN); cfg_base 202 drivers/net/can/sja1000/peak_pci.c gp_out = readb(card->cfg_base + PITA_GPOUT) & ~PITA_GPIN_SCL; cfg_base 203 drivers/net/can/sja1000/peak_pci.c writeb(gp_out, card->cfg_base + PITA_GPOUT); cfg_base 206 drivers/net/can/sja1000/peak_pci.c gp_outen = readb(card->cfg_base + PITA_GPOEN); cfg_base 212 drivers/net/can/sja1000/peak_pci.c writeb(gp_outen, card->cfg_base + PITA_GPOEN); cfg_base 222 drivers/net/can/sja1000/peak_pci.c return (readb(card->cfg_base + PITA_GPIN) & PITA_GPIN_SDA) ? 1 : 0; cfg_base 232 drivers/net/can/sja1000/peak_pci.c return (readb(card->cfg_base + PITA_GPIN) & PITA_GPIN_SCL) ? 1 : 0; cfg_base 452 drivers/net/can/sja1000/peak_pci.c card->cfg_base = chan->cfg_base; cfg_base 541 drivers/net/can/sja1000/peak_pci.c icr = readw(chan->cfg_base + PITA_ICR); cfg_base 543 drivers/net/can/sja1000/peak_pci.c writew(chan->icr_mask, chan->cfg_base + PITA_ICR); cfg_base 551 drivers/net/can/sja1000/peak_pci.c void __iomem *cfg_base, *reg_base; cfg_base 583 drivers/net/can/sja1000/peak_pci.c cfg_base = pci_iomap(pdev, 0, PEAK_PCI_CFG_SIZE); cfg_base 584 drivers/net/can/sja1000/peak_pci.c if (!cfg_base) { cfg_base 598 drivers/net/can/sja1000/peak_pci.c writew(0x0005, cfg_base + PITA_GPIOICR + 2); cfg_base 600 drivers/net/can/sja1000/peak_pci.c writeb(0x00, cfg_base + PITA_GPIOICR); cfg_base 602 drivers/net/can/sja1000/peak_pci.c writeb(0x05, cfg_base + PITA_MISC + 3); cfg_base 605 drivers/net/can/sja1000/peak_pci.c writeb(0x04, cfg_base + PITA_MISC + 3); cfg_base 607 drivers/net/can/sja1000/peak_pci.c icr = readw(cfg_base + PITA_ICR + 2); cfg_base 619 drivers/net/can/sja1000/peak_pci.c chan->cfg_base = cfg_base; cfg_base 671 drivers/net/can/sja1000/peak_pci.c dev->name, priv->reg_base, chan->cfg_base, dev->irq); cfg_base 675 drivers/net/can/sja1000/peak_pci.c writew(icr, cfg_base + PITA_ICR + 2); cfg_base 685 drivers/net/can/sja1000/peak_pci.c writew(0x0, cfg_base + PITA_ICR + 2); cfg_base 704 drivers/net/can/sja1000/peak_pci.c pci_iounmap(pdev, cfg_base); cfg_base 723 drivers/net/can/sja1000/peak_pci.c void __iomem *cfg_base = chan->cfg_base; cfg_base 727 drivers/net/can/sja1000/peak_pci.c writew(0x0, cfg_base + PITA_ICR + 2); cfg_base 749 drivers/net/can/sja1000/peak_pci.c pci_iounmap(pdev, cfg_base); cfg_base 1526 drivers/net/usb/smsc75xx.c int cfg_base = WUF_CFGX + filter * 4; cfg_base 1530 drivers/net/usb/smsc75xx.c ret = smsc75xx_write_reg(dev, cfg_base, wuf_cfg); cfg_base 82 drivers/pci/controller/dwc/pci-meson.c void __iomem *cfg_base; cfg_base 179 drivers/pci/controller/dwc/pci-meson.c mp->mem_res.cfg_base = meson_pcie_get_mem(pdev, mp, "cfg"); cfg_base 180 drivers/pci/controller/dwc/pci-meson.c if (IS_ERR(mp->mem_res.cfg_base)) cfg_base 181 drivers/pci/controller/dwc/pci-meson.c return PTR_ERR(mp->mem_res.cfg_base); cfg_base 280 drivers/pci/controller/dwc/pci-meson.c return readl(mp->mem_res.cfg_base + reg); cfg_base 285 drivers/pci/controller/dwc/pci-meson.c writel(val, mp->mem_res.cfg_base + reg); cfg_base 69 drivers/pci/controller/pci-xgene.c void __iomem *cfg_base; cfg_base 110 drivers/pci/controller/pci-xgene.c return port->cfg_base + AXI_EP_CFG_ACCESS; cfg_base 112 drivers/pci/controller/pci-xgene.c return port->cfg_base; cfg_base 247 drivers/pci/controller/pci-xgene.c port->cfg_base = cfg->win; cfg_base 359 drivers/pci/controller/pci-xgene.c port->cfg_base = devm_ioremap_resource(dev, res); cfg_base 360 drivers/pci/controller/pci-xgene.c if (IS_ERR(port->cfg_base)) cfg_base 361 drivers/pci/controller/pci-xgene.c return PTR_ERR(port->cfg_base); cfg_base 490 drivers/pci/controller/pci-xgene.c void __iomem *cfg_base = port->cfg_base; cfg_base 515 drivers/pci/controller/pci-xgene.c bar_addr = cfg_base + PCI_BASE_ADDRESS_0; cfg_base 34 drivers/pci/controller/pcie-cadence-host.c void __iomem *cfg_base; cfg_base 86 drivers/pci/controller/pcie-cadence-host.c return rc->cfg_base + (where & 0xfff); cfg_base 278 drivers/pci/controller/pcie-cadence-host.c rc->cfg_base = devm_pci_remap_cfg_resource(dev, res); cfg_base 279 drivers/pci/controller/pcie-cadence-host.c if (IS_ERR(rc->cfg_base)) { cfg_base 281 drivers/pci/controller/pcie-cadence-host.c return PTR_ERR(rc->cfg_base);