cfg0_regs          25 arch/arm/mach-cns3xxx/pcie.c 	void __iomem *cfg0_regs; /* PCI Type 0 config registers */
cfg0_regs          77 arch/arm/mach-cns3xxx/pcie.c 			base = cnspci->cfg0_regs;
cfg0_regs         143 arch/arm/mach-cns3xxx/pcie.c 		.cfg0_regs = (void __iomem *)CNS3XXX_PCIE0_CFG0_BASE_VIRT,
cfg0_regs         162 arch/arm/mach-cns3xxx/pcie.c 		.cfg0_regs = (void __iomem *)CNS3XXX_PCIE1_CFG0_BASE_VIRT,