cfg01             360 arch/mips/pci/pci-octeon.c 	union cvmx_pci_cfg01 cfg01;
cfg01             478 arch/mips/pci/pci-octeon.c 	cfg01.u32 = 0;
cfg01             479 arch/mips/pci/pci-octeon.c 	cfg01.s.msae = 1;	/* Memory Space Access Enable */
cfg01             480 arch/mips/pci/pci-octeon.c 	cfg01.s.me = 1;		/* Master Enable */
cfg01             481 arch/mips/pci/pci-octeon.c 	cfg01.s.pee = 1;	/* PERR# Enable */
cfg01             482 arch/mips/pci/pci-octeon.c 	cfg01.s.see = 1;	/* System Error Enable */
cfg01             483 arch/mips/pci/pci-octeon.c 	cfg01.s.fbbe = 1;	/* Fast Back to Back Transaction Enable */
cfg01             485 arch/mips/pci/pci-octeon.c 	octeon_npi_write32(CVMX_NPI_PCI_CFG01, cfg01.u32);
cfg01              25 drivers/edac/octeon_edac-pci.c 	union cvmx_pci_cfg01 cfg01;
cfg01              27 drivers/edac/octeon_edac-pci.c 	cfg01.u32 = octeon_npi_read32(CVMX_NPI_PCI_CFG01);
cfg01              28 drivers/edac/octeon_edac-pci.c 	if (cfg01.s.dpe) {		/* Detected parity error */
cfg01              30 drivers/edac/octeon_edac-pci.c 		cfg01.s.dpe = 1;		/* Reset  */
cfg01              31 drivers/edac/octeon_edac-pci.c 		octeon_npi_write32(CVMX_NPI_PCI_CFG01, cfg01.u32);
cfg01              33 drivers/edac/octeon_edac-pci.c 	if (cfg01.s.sse) {
cfg01              35 drivers/edac/octeon_edac-pci.c 		cfg01.s.sse = 1;		/* Reset */
cfg01              36 drivers/edac/octeon_edac-pci.c 		octeon_npi_write32(CVMX_NPI_PCI_CFG01, cfg01.u32);
cfg01              38 drivers/edac/octeon_edac-pci.c 	if (cfg01.s.rma) {
cfg01              40 drivers/edac/octeon_edac-pci.c 		cfg01.s.rma = 1;		/* Reset */
cfg01              41 drivers/edac/octeon_edac-pci.c 		octeon_npi_write32(CVMX_NPI_PCI_CFG01, cfg01.u32);
cfg01              43 drivers/edac/octeon_edac-pci.c 	if (cfg01.s.rta) {
cfg01              45 drivers/edac/octeon_edac-pci.c 		cfg01.s.rta = 1;		/* Reset */
cfg01              46 drivers/edac/octeon_edac-pci.c 		octeon_npi_write32(CVMX_NPI_PCI_CFG01, cfg01.u32);
cfg01              48 drivers/edac/octeon_edac-pci.c 	if (cfg01.s.sta) {
cfg01              50 drivers/edac/octeon_edac-pci.c 		cfg01.s.sta = 1;		/* Reset */
cfg01              51 drivers/edac/octeon_edac-pci.c 		octeon_npi_write32(CVMX_NPI_PCI_CFG01, cfg01.u32);
cfg01              53 drivers/edac/octeon_edac-pci.c 	if (cfg01.s.mdpe) {
cfg01              55 drivers/edac/octeon_edac-pci.c 		cfg01.s.mdpe = 1;		/* Reset */
cfg01              56 drivers/edac/octeon_edac-pci.c 		octeon_npi_write32(CVMX_NPI_PCI_CFG01, cfg01.u32);