cdclk 129 drivers/clk/samsung/clk-exynos-audss.c struct clk *pll_ref, *pll_in, *cdclk, *sclk_audio, *sclk_pcm_in; cdclk 191 drivers/clk/samsung/clk-exynos-audss.c cdclk = devm_clk_get(dev, "cdclk"); cdclk 193 drivers/clk/samsung/clk-exynos-audss.c if (!IS_ERR(cdclk)) cdclk 194 drivers/clk/samsung/clk-exynos-audss.c mout_i2s_p[1] = __clk_get_name(cdclk); cdclk 71 drivers/clk/samsung/clk-s5pv210-audss.c struct clk *hclk, *pll_ref, *pll_in, *cdclk, *sclk_audio; cdclk 109 drivers/clk/samsung/clk-s5pv210-audss.c cdclk = devm_clk_get(&pdev->dev, "iiscdclk0"); cdclk 123 drivers/clk/samsung/clk-s5pv210-audss.c if (!IS_ERR(cdclk)) cdclk 124 drivers/clk/samsung/clk-s5pv210-audss.c mout_i2s_p[1] = __clk_get_name(cdclk); cdclk 815 drivers/gpu/drm/i915/display/intel_audio.c to_intel_atomic_state(state)->cdclk.force_min_cdclk_changed = true; cdclk 816 drivers/gpu/drm/i915/display/intel_audio.c to_intel_atomic_state(state)->cdclk.force_min_cdclk = cdclk 913 drivers/gpu/drm/i915/display/intel_audio.c return dev_priv->cdclk.hw.cdclk; cdclk 59 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = 133333; cdclk 65 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = 200000; cdclk 71 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = 266667; cdclk 77 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = 333333; cdclk 83 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = 400000; cdclk 89 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = 450000; cdclk 104 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = 133333; cdclk 118 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = 200000; cdclk 121 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = 250000; cdclk 124 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = 133333; cdclk 129 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = 266667; cdclk 143 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = 133333; cdclk 149 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = 333333; cdclk 153 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = 190000; cdclk 167 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = 133333; cdclk 173 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = 320000; cdclk 177 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = 200000; cdclk 289 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = DIV_ROUND_CLOSEST(cdclk_state->vco, cdclk 296 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = 190476; cdclk 309 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = 266667; cdclk 312 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = 333333; cdclk 315 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = 444444; cdclk 318 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = 200000; cdclk 324 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = 133333; cdclk 327 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = 166667; cdclk 366 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = DIV_ROUND_CLOSEST(cdclk_state->vco, cdclk 373 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = 200000; cdclk 393 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = cdclk_sel ? 333333 : 222222; cdclk 396 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = cdclk_sel ? 320000 : 228571; cdclk 401 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = 222222; cdclk 413 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = 800000; cdclk 415 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = 450000; cdclk 417 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = 450000; cdclk 419 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = 337500; cdclk 421 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = 540000; cdclk 444 drivers/gpu/drm/i915/display/intel_cdclk.c static u8 vlv_calc_voltage_level(struct drm_i915_private *dev_priv, int cdclk) cdclk 447 drivers/gpu/drm/i915/display/intel_cdclk.c if (cdclk >= 320000) /* jump to highest voltage for 400MHz too */ cdclk 449 drivers/gpu/drm/i915/display/intel_cdclk.c else if (cdclk >= 266667) cdclk 459 drivers/gpu/drm/i915/display/intel_cdclk.c return DIV_ROUND_CLOSEST(dev_priv->hpll_freq << 1, cdclk) - 1; cdclk 472 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = vlv_get_cck_clock(dev_priv, "cdclk", cdclk 498 drivers/gpu/drm/i915/display/intel_cdclk.c if (dev_priv->cdclk.hw.cdclk >= dev_priv->czclk_freq) { cdclk 529 drivers/gpu/drm/i915/display/intel_cdclk.c int cdclk = cdclk_state->cdclk; cdclk 533 drivers/gpu/drm/i915/display/intel_cdclk.c switch (cdclk) { cdclk 541 drivers/gpu/drm/i915/display/intel_cdclk.c MISSING_CASE(cdclk); cdclk 568 drivers/gpu/drm/i915/display/intel_cdclk.c if (cdclk == 400000) { cdclk 572 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk) - 1; cdclk 594 drivers/gpu/drm/i915/display/intel_cdclk.c if (cdclk == 400000) cdclk 616 drivers/gpu/drm/i915/display/intel_cdclk.c int cdclk = cdclk_state->cdclk; cdclk 620 drivers/gpu/drm/i915/display/intel_cdclk.c switch (cdclk) { cdclk 627 drivers/gpu/drm/i915/display/intel_cdclk.c MISSING_CASE(cdclk); cdclk 671 drivers/gpu/drm/i915/display/intel_cdclk.c static u8 bdw_calc_voltage_level(int cdclk) cdclk 673 drivers/gpu/drm/i915/display/intel_cdclk.c switch (cdclk) { cdclk 693 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = 800000; cdclk 695 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = 450000; cdclk 697 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = 450000; cdclk 699 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = 540000; cdclk 701 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = 337500; cdclk 703 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = 675000; cdclk 710 drivers/gpu/drm/i915/display/intel_cdclk.c bdw_calc_voltage_level(cdclk_state->cdclk); cdclk 717 drivers/gpu/drm/i915/display/intel_cdclk.c int cdclk = cdclk_state->cdclk; cdclk 751 drivers/gpu/drm/i915/display/intel_cdclk.c switch (cdclk) { cdclk 753 drivers/gpu/drm/i915/display/intel_cdclk.c MISSING_CASE(cdclk); cdclk 782 drivers/gpu/drm/i915/display/intel_cdclk.c I915_WRITE(CDCLK_FREQ, DIV_ROUND_CLOSEST(cdclk, 1000) - 1); cdclk 810 drivers/gpu/drm/i915/display/intel_cdclk.c static u8 skl_calc_voltage_level(int cdclk) cdclk 812 drivers/gpu/drm/i915/display/intel_cdclk.c if (cdclk > 540000) cdclk 814 drivers/gpu/drm/i915/display/intel_cdclk.c else if (cdclk > 450000) cdclk 816 drivers/gpu/drm/i915/display/intel_cdclk.c else if (cdclk > 337500) cdclk 869 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = cdclk_state->bypass = cdclk_state->ref; cdclk 879 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = 432000; cdclk 882 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = 308571; cdclk 885 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = 540000; cdclk 888 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = 617143; cdclk 897 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = 450000; cdclk 900 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = 337500; cdclk 903 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = 540000; cdclk 906 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = 675000; cdclk 920 drivers/gpu/drm/i915/display/intel_cdclk.c skl_calc_voltage_level(cdclk_state->cdclk); cdclk 924 drivers/gpu/drm/i915/display/intel_cdclk.c static int skl_cdclk_decimal(int cdclk) cdclk 926 drivers/gpu/drm/i915/display/intel_cdclk.c return DIV_ROUND_CLOSEST(cdclk - 1000, 500); cdclk 975 drivers/gpu/drm/i915/display/intel_cdclk.c dev_priv->cdclk.hw.vco = vco; cdclk 987 drivers/gpu/drm/i915/display/intel_cdclk.c dev_priv->cdclk.hw.vco = 0; cdclk 994 drivers/gpu/drm/i915/display/intel_cdclk.c int cdclk = cdclk_state->cdclk; cdclk 1020 drivers/gpu/drm/i915/display/intel_cdclk.c switch (cdclk) { cdclk 1022 drivers/gpu/drm/i915/display/intel_cdclk.c WARN_ON(cdclk != dev_priv->cdclk.hw.bypass); cdclk 1042 drivers/gpu/drm/i915/display/intel_cdclk.c if (dev_priv->cdclk.hw.vco != 0 && cdclk 1043 drivers/gpu/drm/i915/display/intel_cdclk.c dev_priv->cdclk.hw.vco != vco) cdclk 1048 drivers/gpu/drm/i915/display/intel_cdclk.c if (dev_priv->cdclk.hw.vco != vco) { cdclk 1051 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_ctl |= freq_select | skl_cdclk_decimal(cdclk); cdclk 1060 drivers/gpu/drm/i915/display/intel_cdclk.c if (dev_priv->cdclk.hw.vco != vco) cdclk 1067 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_ctl |= freq_select | skl_cdclk_decimal(cdclk); cdclk 1095 drivers/gpu/drm/i915/display/intel_cdclk.c intel_dump_cdclk_state(&dev_priv->cdclk.hw, "Current CDCLK"); cdclk 1098 drivers/gpu/drm/i915/display/intel_cdclk.c if (dev_priv->cdclk.hw.vco == 0 || cdclk 1099 drivers/gpu/drm/i915/display/intel_cdclk.c dev_priv->cdclk.hw.cdclk == dev_priv->cdclk.hw.bypass) cdclk 1110 drivers/gpu/drm/i915/display/intel_cdclk.c skl_cdclk_decimal(dev_priv->cdclk.hw.cdclk); cdclk 1119 drivers/gpu/drm/i915/display/intel_cdclk.c dev_priv->cdclk.hw.cdclk = 0; cdclk 1121 drivers/gpu/drm/i915/display/intel_cdclk.c dev_priv->cdclk.hw.vco = -1; cdclk 1130 drivers/gpu/drm/i915/display/intel_cdclk.c if (dev_priv->cdclk.hw.cdclk != 0 && cdclk 1131 drivers/gpu/drm/i915/display/intel_cdclk.c dev_priv->cdclk.hw.vco != 0) { cdclk 1138 drivers/gpu/drm/i915/display/intel_cdclk.c dev_priv->cdclk.hw.vco); cdclk 1142 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state = dev_priv->cdclk.hw; cdclk 1147 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state.cdclk = skl_calc_cdclk(0, cdclk_state.vco); cdclk 1148 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state.voltage_level = skl_calc_voltage_level(cdclk_state.cdclk); cdclk 1155 drivers/gpu/drm/i915/display/intel_cdclk.c struct intel_cdclk_state cdclk_state = dev_priv->cdclk.hw; cdclk 1157 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state.cdclk = cdclk_state.bypass; cdclk 1159 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state.voltage_level = skl_calc_voltage_level(cdclk_state.cdclk); cdclk 1188 drivers/gpu/drm/i915/display/intel_cdclk.c static u8 bxt_calc_voltage_level(int cdclk) cdclk 1190 drivers/gpu/drm/i915/display/intel_cdclk.c return DIV_ROUND_UP(cdclk, 25000); cdclk 1193 drivers/gpu/drm/i915/display/intel_cdclk.c static int bxt_de_pll_vco(struct drm_i915_private *dev_priv, int cdclk) cdclk 1197 drivers/gpu/drm/i915/display/intel_cdclk.c if (cdclk == dev_priv->cdclk.hw.bypass) cdclk 1200 drivers/gpu/drm/i915/display/intel_cdclk.c switch (cdclk) { cdclk 1202 drivers/gpu/drm/i915/display/intel_cdclk.c MISSING_CASE(cdclk); cdclk 1215 drivers/gpu/drm/i915/display/intel_cdclk.c return dev_priv->cdclk.hw.ref * ratio; cdclk 1218 drivers/gpu/drm/i915/display/intel_cdclk.c static int glk_de_pll_vco(struct drm_i915_private *dev_priv, int cdclk) cdclk 1222 drivers/gpu/drm/i915/display/intel_cdclk.c if (cdclk == dev_priv->cdclk.hw.bypass) cdclk 1225 drivers/gpu/drm/i915/display/intel_cdclk.c switch (cdclk) { cdclk 1227 drivers/gpu/drm/i915/display/intel_cdclk.c MISSING_CASE(cdclk); cdclk 1236 drivers/gpu/drm/i915/display/intel_cdclk.c return dev_priv->cdclk.hw.ref * ratio; cdclk 1266 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = cdclk_state->bypass = cdclk_state->ref; cdclk 1292 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = DIV_ROUND_CLOSEST(cdclk_state->vco, div); cdclk 1300 drivers/gpu/drm/i915/display/intel_cdclk.c bxt_calc_voltage_level(cdclk_state->cdclk); cdclk 1312 drivers/gpu/drm/i915/display/intel_cdclk.c dev_priv->cdclk.hw.vco = 0; cdclk 1317 drivers/gpu/drm/i915/display/intel_cdclk.c int ratio = DIV_ROUND_CLOSEST(vco, dev_priv->cdclk.hw.ref); cdclk 1332 drivers/gpu/drm/i915/display/intel_cdclk.c dev_priv->cdclk.hw.vco = vco; cdclk 1339 drivers/gpu/drm/i915/display/intel_cdclk.c int cdclk = cdclk_state->cdclk; cdclk 1345 drivers/gpu/drm/i915/display/intel_cdclk.c switch (DIV_ROUND_CLOSEST(vco, cdclk)) { cdclk 1347 drivers/gpu/drm/i915/display/intel_cdclk.c WARN_ON(cdclk != dev_priv->cdclk.hw.bypass); cdclk 1375 drivers/gpu/drm/i915/display/intel_cdclk.c ret, cdclk); cdclk 1379 drivers/gpu/drm/i915/display/intel_cdclk.c if (dev_priv->cdclk.hw.vco != 0 && cdclk 1380 drivers/gpu/drm/i915/display/intel_cdclk.c dev_priv->cdclk.hw.vco != vco) cdclk 1383 drivers/gpu/drm/i915/display/intel_cdclk.c if (dev_priv->cdclk.hw.vco != vco) cdclk 1386 drivers/gpu/drm/i915/display/intel_cdclk.c val = divider | skl_cdclk_decimal(cdclk); cdclk 1395 drivers/gpu/drm/i915/display/intel_cdclk.c if (cdclk >= 500000) cdclk 1413 drivers/gpu/drm/i915/display/intel_cdclk.c ret, cdclk); cdclk 1425 drivers/gpu/drm/i915/display/intel_cdclk.c intel_dump_cdclk_state(&dev_priv->cdclk.hw, "Current CDCLK"); cdclk 1427 drivers/gpu/drm/i915/display/intel_cdclk.c if (dev_priv->cdclk.hw.vco == 0 || cdclk 1428 drivers/gpu/drm/i915/display/intel_cdclk.c dev_priv->cdclk.hw.cdclk == dev_priv->cdclk.hw.bypass) cdclk 1446 drivers/gpu/drm/i915/display/intel_cdclk.c skl_cdclk_decimal(dev_priv->cdclk.hw.cdclk); cdclk 1451 drivers/gpu/drm/i915/display/intel_cdclk.c if (dev_priv->cdclk.hw.cdclk >= 500000) cdclk 1462 drivers/gpu/drm/i915/display/intel_cdclk.c dev_priv->cdclk.hw.cdclk = 0; cdclk 1465 drivers/gpu/drm/i915/display/intel_cdclk.c dev_priv->cdclk.hw.vco = -1; cdclk 1474 drivers/gpu/drm/i915/display/intel_cdclk.c if (dev_priv->cdclk.hw.cdclk != 0 && cdclk 1475 drivers/gpu/drm/i915/display/intel_cdclk.c dev_priv->cdclk.hw.vco != 0) cdclk 1478 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state = dev_priv->cdclk.hw; cdclk 1486 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state.cdclk = glk_calc_cdclk(0); cdclk 1487 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state.vco = glk_de_pll_vco(dev_priv, cdclk_state.cdclk); cdclk 1489 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state.cdclk = bxt_calc_cdclk(0); cdclk 1490 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state.vco = bxt_de_pll_vco(dev_priv, cdclk_state.cdclk); cdclk 1492 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state.voltage_level = bxt_calc_voltage_level(cdclk_state.cdclk); cdclk 1499 drivers/gpu/drm/i915/display/intel_cdclk.c struct intel_cdclk_state cdclk_state = dev_priv->cdclk.hw; cdclk 1501 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state.cdclk = cdclk_state.bypass; cdclk 1503 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state.voltage_level = bxt_calc_voltage_level(cdclk_state.cdclk); cdclk 1518 drivers/gpu/drm/i915/display/intel_cdclk.c static u8 cnl_calc_voltage_level(int cdclk) cdclk 1520 drivers/gpu/drm/i915/display/intel_cdclk.c if (cdclk > 336000) cdclk 1522 drivers/gpu/drm/i915/display/intel_cdclk.c else if (cdclk > 168000) cdclk 1558 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = cdclk_state->bypass = cdclk_state->ref; cdclk 1577 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = DIV_ROUND_CLOSEST(cdclk_state->vco, div); cdclk 1585 drivers/gpu/drm/i915/display/intel_cdclk.c cnl_calc_voltage_level(cdclk_state->cdclk); cdclk 1600 drivers/gpu/drm/i915/display/intel_cdclk.c dev_priv->cdclk.hw.vco = 0; cdclk 1605 drivers/gpu/drm/i915/display/intel_cdclk.c int ratio = DIV_ROUND_CLOSEST(vco, dev_priv->cdclk.hw.ref); cdclk 1618 drivers/gpu/drm/i915/display/intel_cdclk.c dev_priv->cdclk.hw.vco = vco; cdclk 1625 drivers/gpu/drm/i915/display/intel_cdclk.c int cdclk = cdclk_state->cdclk; cdclk 1641 drivers/gpu/drm/i915/display/intel_cdclk.c switch (DIV_ROUND_CLOSEST(vco, cdclk)) { cdclk 1643 drivers/gpu/drm/i915/display/intel_cdclk.c WARN_ON(cdclk != dev_priv->cdclk.hw.bypass); cdclk 1654 drivers/gpu/drm/i915/display/intel_cdclk.c if (dev_priv->cdclk.hw.vco != 0 && cdclk 1655 drivers/gpu/drm/i915/display/intel_cdclk.c dev_priv->cdclk.hw.vco != vco) cdclk 1658 drivers/gpu/drm/i915/display/intel_cdclk.c if (dev_priv->cdclk.hw.vco != vco) cdclk 1661 drivers/gpu/drm/i915/display/intel_cdclk.c val = divider | skl_cdclk_decimal(cdclk); cdclk 1681 drivers/gpu/drm/i915/display/intel_cdclk.c dev_priv->cdclk.hw.voltage_level = cdclk_state->voltage_level; cdclk 1684 drivers/gpu/drm/i915/display/intel_cdclk.c static int cnl_cdclk_pll_vco(struct drm_i915_private *dev_priv, int cdclk) cdclk 1688 drivers/gpu/drm/i915/display/intel_cdclk.c if (cdclk == dev_priv->cdclk.hw.bypass) cdclk 1691 drivers/gpu/drm/i915/display/intel_cdclk.c switch (cdclk) { cdclk 1693 drivers/gpu/drm/i915/display/intel_cdclk.c MISSING_CASE(cdclk); cdclk 1697 drivers/gpu/drm/i915/display/intel_cdclk.c ratio = dev_priv->cdclk.hw.ref == 19200 ? 35 : 28; cdclk 1700 drivers/gpu/drm/i915/display/intel_cdclk.c ratio = dev_priv->cdclk.hw.ref == 19200 ? 55 : 44; cdclk 1704 drivers/gpu/drm/i915/display/intel_cdclk.c return dev_priv->cdclk.hw.ref * ratio; cdclk 1712 drivers/gpu/drm/i915/display/intel_cdclk.c intel_dump_cdclk_state(&dev_priv->cdclk.hw, "Current CDCLK"); cdclk 1714 drivers/gpu/drm/i915/display/intel_cdclk.c if (dev_priv->cdclk.hw.vco == 0 || cdclk 1715 drivers/gpu/drm/i915/display/intel_cdclk.c dev_priv->cdclk.hw.cdclk == dev_priv->cdclk.hw.bypass) cdclk 1733 drivers/gpu/drm/i915/display/intel_cdclk.c skl_cdclk_decimal(dev_priv->cdclk.hw.cdclk); cdclk 1743 drivers/gpu/drm/i915/display/intel_cdclk.c dev_priv->cdclk.hw.cdclk = 0; cdclk 1746 drivers/gpu/drm/i915/display/intel_cdclk.c dev_priv->cdclk.hw.vco = -1; cdclk 1780 drivers/gpu/drm/i915/display/intel_cdclk.c static int icl_calc_cdclk_pll_vco(struct drm_i915_private *dev_priv, int cdclk) cdclk 1784 drivers/gpu/drm/i915/display/intel_cdclk.c if (cdclk == dev_priv->cdclk.hw.bypass) cdclk 1787 drivers/gpu/drm/i915/display/intel_cdclk.c switch (cdclk) { cdclk 1789 drivers/gpu/drm/i915/display/intel_cdclk.c MISSING_CASE(cdclk); cdclk 1795 drivers/gpu/drm/i915/display/intel_cdclk.c WARN_ON(dev_priv->cdclk.hw.ref != 19200 && cdclk 1796 drivers/gpu/drm/i915/display/intel_cdclk.c dev_priv->cdclk.hw.ref != 38400); cdclk 1802 drivers/gpu/drm/i915/display/intel_cdclk.c WARN_ON(dev_priv->cdclk.hw.ref != 24000); cdclk 1805 drivers/gpu/drm/i915/display/intel_cdclk.c WARN_ON(dev_priv->cdclk.hw.ref != 19200 && cdclk 1806 drivers/gpu/drm/i915/display/intel_cdclk.c dev_priv->cdclk.hw.ref != 38400 && cdclk 1807 drivers/gpu/drm/i915/display/intel_cdclk.c dev_priv->cdclk.hw.ref != 24000); cdclk 1811 drivers/gpu/drm/i915/display/intel_cdclk.c ratio = cdclk / (dev_priv->cdclk.hw.ref / 2); cdclk 1813 drivers/gpu/drm/i915/display/intel_cdclk.c return dev_priv->cdclk.hw.ref * ratio; cdclk 1820 drivers/gpu/drm/i915/display/intel_cdclk.c unsigned int cdclk = cdclk_state->cdclk; cdclk 1834 drivers/gpu/drm/i915/display/intel_cdclk.c if (dev_priv->cdclk.hw.vco != 0 && cdclk 1835 drivers/gpu/drm/i915/display/intel_cdclk.c dev_priv->cdclk.hw.vco != vco) cdclk 1838 drivers/gpu/drm/i915/display/intel_cdclk.c if (dev_priv->cdclk.hw.vco != vco) cdclk 1847 drivers/gpu/drm/i915/display/intel_cdclk.c skl_cdclk_decimal(cdclk)); cdclk 1858 drivers/gpu/drm/i915/display/intel_cdclk.c dev_priv->cdclk.hw.voltage_level = cdclk_state->voltage_level; cdclk 1861 drivers/gpu/drm/i915/display/intel_cdclk.c static u8 icl_calc_voltage_level(struct drm_i915_private *dev_priv, int cdclk) cdclk 1864 drivers/gpu/drm/i915/display/intel_cdclk.c if (cdclk > 312000) cdclk 1866 drivers/gpu/drm/i915/display/intel_cdclk.c else if (cdclk > 180000) cdclk 1871 drivers/gpu/drm/i915/display/intel_cdclk.c if (cdclk > 556800) cdclk 1873 drivers/gpu/drm/i915/display/intel_cdclk.c else if (cdclk > 312000) cdclk 1911 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = cdclk_state->bypass; cdclk 1920 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = cdclk_state->vco / 2; cdclk 1928 drivers/gpu/drm/i915/display/intel_cdclk.c icl_calc_voltage_level(dev_priv, cdclk_state->cdclk); cdclk 1938 drivers/gpu/drm/i915/display/intel_cdclk.c intel_dump_cdclk_state(&dev_priv->cdclk.hw, "Current CDCLK"); cdclk 1941 drivers/gpu/drm/i915/display/intel_cdclk.c if (dev_priv->cdclk.hw.cdclk == dev_priv->cdclk.hw.bypass) cdclk 1950 drivers/gpu/drm/i915/display/intel_cdclk.c skl_cdclk_decimal(dev_priv->cdclk.hw.cdclk)) cdclk 1958 drivers/gpu/drm/i915/display/intel_cdclk.c sanitized_state.ref = dev_priv->cdclk.hw.ref; cdclk 1959 drivers/gpu/drm/i915/display/intel_cdclk.c sanitized_state.cdclk = icl_calc_cdclk(0, sanitized_state.ref); cdclk 1961 drivers/gpu/drm/i915/display/intel_cdclk.c sanitized_state.cdclk); cdclk 1964 drivers/gpu/drm/i915/display/intel_cdclk.c sanitized_state.cdclk); cdclk 1971 drivers/gpu/drm/i915/display/intel_cdclk.c struct intel_cdclk_state cdclk_state = dev_priv->cdclk.hw; cdclk 1973 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state.cdclk = cdclk_state.bypass; cdclk 1976 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state.cdclk); cdclk 1987 drivers/gpu/drm/i915/display/intel_cdclk.c if (dev_priv->cdclk.hw.cdclk != 0 && cdclk 1988 drivers/gpu/drm/i915/display/intel_cdclk.c dev_priv->cdclk.hw.vco != 0) cdclk 1991 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state = dev_priv->cdclk.hw; cdclk 1993 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state.cdclk = cnl_calc_cdclk(0); cdclk 1994 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state.vco = cnl_cdclk_pll_vco(dev_priv, cdclk_state.cdclk); cdclk 1995 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state.voltage_level = cnl_calc_voltage_level(cdclk_state.cdclk); cdclk 2002 drivers/gpu/drm/i915/display/intel_cdclk.c struct intel_cdclk_state cdclk_state = dev_priv->cdclk.hw; cdclk 2004 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state.cdclk = cdclk_state.bypass; cdclk 2006 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state.voltage_level = cnl_calc_voltage_level(cdclk_state.cdclk); cdclk 2062 drivers/gpu/drm/i915/display/intel_cdclk.c return a->cdclk != b->cdclk || cdclk 2084 drivers/gpu/drm/i915/display/intel_cdclk.c return a->cdclk != b->cdclk && cdclk 2120 drivers/gpu/drm/i915/display/intel_cdclk.c swap(state->cdclk.logical, dev_priv->cdclk.logical); cdclk 2121 drivers/gpu/drm/i915/display/intel_cdclk.c swap(state->cdclk.actual, dev_priv->cdclk.actual); cdclk 2128 drivers/gpu/drm/i915/display/intel_cdclk.c context, cdclk_state->cdclk, cdclk_state->vco, cdclk 2146 drivers/gpu/drm/i915/display/intel_cdclk.c if (!intel_cdclk_changed(&dev_priv->cdclk.hw, cdclk_state)) cdclk 2156 drivers/gpu/drm/i915/display/intel_cdclk.c if (WARN(intel_cdclk_changed(&dev_priv->cdclk.hw, cdclk_state), cdclk 2158 drivers/gpu/drm/i915/display/intel_cdclk.c intel_dump_cdclk_state(&dev_priv->cdclk.hw, "[hw state]"); cdclk 2179 drivers/gpu/drm/i915/display/intel_cdclk.c if (pipe == INVALID_PIPE || old_state->cdclk <= new_state->cdclk) cdclk 2199 drivers/gpu/drm/i915/display/intel_cdclk.c if (pipe != INVALID_PIPE && old_state->cdclk > new_state->cdclk) cdclk 2313 drivers/gpu/drm/i915/display/intel_cdclk.c min_cdclk = state->cdclk.force_min_cdclk; cdclk 2360 drivers/gpu/drm/i915/display/intel_cdclk.c int min_cdclk, cdclk; cdclk 2366 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk = vlv_calc_cdclk(dev_priv, min_cdclk); cdclk 2368 drivers/gpu/drm/i915/display/intel_cdclk.c state->cdclk.logical.cdclk = cdclk; cdclk 2369 drivers/gpu/drm/i915/display/intel_cdclk.c state->cdclk.logical.voltage_level = cdclk 2370 drivers/gpu/drm/i915/display/intel_cdclk.c vlv_calc_voltage_level(dev_priv, cdclk); cdclk 2373 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk = vlv_calc_cdclk(dev_priv, state->cdclk.force_min_cdclk); cdclk 2375 drivers/gpu/drm/i915/display/intel_cdclk.c state->cdclk.actual.cdclk = cdclk; cdclk 2376 drivers/gpu/drm/i915/display/intel_cdclk.c state->cdclk.actual.voltage_level = cdclk 2377 drivers/gpu/drm/i915/display/intel_cdclk.c vlv_calc_voltage_level(dev_priv, cdclk); cdclk 2379 drivers/gpu/drm/i915/display/intel_cdclk.c state->cdclk.actual = state->cdclk.logical; cdclk 2387 drivers/gpu/drm/i915/display/intel_cdclk.c int min_cdclk, cdclk; cdclk 2397 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk = bdw_calc_cdclk(min_cdclk); cdclk 2399 drivers/gpu/drm/i915/display/intel_cdclk.c state->cdclk.logical.cdclk = cdclk; cdclk 2400 drivers/gpu/drm/i915/display/intel_cdclk.c state->cdclk.logical.voltage_level = cdclk 2401 drivers/gpu/drm/i915/display/intel_cdclk.c bdw_calc_voltage_level(cdclk); cdclk 2404 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk = bdw_calc_cdclk(state->cdclk.force_min_cdclk); cdclk 2406 drivers/gpu/drm/i915/display/intel_cdclk.c state->cdclk.actual.cdclk = cdclk; cdclk 2407 drivers/gpu/drm/i915/display/intel_cdclk.c state->cdclk.actual.voltage_level = cdclk 2408 drivers/gpu/drm/i915/display/intel_cdclk.c bdw_calc_voltage_level(cdclk); cdclk 2410 drivers/gpu/drm/i915/display/intel_cdclk.c state->cdclk.actual = state->cdclk.logical; cdclk 2423 drivers/gpu/drm/i915/display/intel_cdclk.c vco = state->cdclk.logical.vco; cdclk 2454 drivers/gpu/drm/i915/display/intel_cdclk.c int min_cdclk, cdclk, vco; cdclk 2466 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk = skl_calc_cdclk(min_cdclk, vco); cdclk 2468 drivers/gpu/drm/i915/display/intel_cdclk.c state->cdclk.logical.vco = vco; cdclk 2469 drivers/gpu/drm/i915/display/intel_cdclk.c state->cdclk.logical.cdclk = cdclk; cdclk 2470 drivers/gpu/drm/i915/display/intel_cdclk.c state->cdclk.logical.voltage_level = cdclk 2471 drivers/gpu/drm/i915/display/intel_cdclk.c skl_calc_voltage_level(cdclk); cdclk 2474 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk = skl_calc_cdclk(state->cdclk.force_min_cdclk, vco); cdclk 2476 drivers/gpu/drm/i915/display/intel_cdclk.c state->cdclk.actual.vco = vco; cdclk 2477 drivers/gpu/drm/i915/display/intel_cdclk.c state->cdclk.actual.cdclk = cdclk; cdclk 2478 drivers/gpu/drm/i915/display/intel_cdclk.c state->cdclk.actual.voltage_level = cdclk 2479 drivers/gpu/drm/i915/display/intel_cdclk.c skl_calc_voltage_level(cdclk); cdclk 2481 drivers/gpu/drm/i915/display/intel_cdclk.c state->cdclk.actual = state->cdclk.logical; cdclk 2490 drivers/gpu/drm/i915/display/intel_cdclk.c int min_cdclk, cdclk, vco; cdclk 2497 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk = glk_calc_cdclk(min_cdclk); cdclk 2498 drivers/gpu/drm/i915/display/intel_cdclk.c vco = glk_de_pll_vco(dev_priv, cdclk); cdclk 2500 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk = bxt_calc_cdclk(min_cdclk); cdclk 2501 drivers/gpu/drm/i915/display/intel_cdclk.c vco = bxt_de_pll_vco(dev_priv, cdclk); cdclk 2504 drivers/gpu/drm/i915/display/intel_cdclk.c state->cdclk.logical.vco = vco; cdclk 2505 drivers/gpu/drm/i915/display/intel_cdclk.c state->cdclk.logical.cdclk = cdclk; cdclk 2506 drivers/gpu/drm/i915/display/intel_cdclk.c state->cdclk.logical.voltage_level = cdclk 2507 drivers/gpu/drm/i915/display/intel_cdclk.c bxt_calc_voltage_level(cdclk); cdclk 2511 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk = glk_calc_cdclk(state->cdclk.force_min_cdclk); cdclk 2512 drivers/gpu/drm/i915/display/intel_cdclk.c vco = glk_de_pll_vco(dev_priv, cdclk); cdclk 2514 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk = bxt_calc_cdclk(state->cdclk.force_min_cdclk); cdclk 2515 drivers/gpu/drm/i915/display/intel_cdclk.c vco = bxt_de_pll_vco(dev_priv, cdclk); cdclk 2518 drivers/gpu/drm/i915/display/intel_cdclk.c state->cdclk.actual.vco = vco; cdclk 2519 drivers/gpu/drm/i915/display/intel_cdclk.c state->cdclk.actual.cdclk = cdclk; cdclk 2520 drivers/gpu/drm/i915/display/intel_cdclk.c state->cdclk.actual.voltage_level = cdclk 2521 drivers/gpu/drm/i915/display/intel_cdclk.c bxt_calc_voltage_level(cdclk); cdclk 2523 drivers/gpu/drm/i915/display/intel_cdclk.c state->cdclk.actual = state->cdclk.logical; cdclk 2532 drivers/gpu/drm/i915/display/intel_cdclk.c int min_cdclk, cdclk, vco; cdclk 2538 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk = cnl_calc_cdclk(min_cdclk); cdclk 2539 drivers/gpu/drm/i915/display/intel_cdclk.c vco = cnl_cdclk_pll_vco(dev_priv, cdclk); cdclk 2541 drivers/gpu/drm/i915/display/intel_cdclk.c state->cdclk.logical.vco = vco; cdclk 2542 drivers/gpu/drm/i915/display/intel_cdclk.c state->cdclk.logical.cdclk = cdclk; cdclk 2543 drivers/gpu/drm/i915/display/intel_cdclk.c state->cdclk.logical.voltage_level = cdclk 2544 drivers/gpu/drm/i915/display/intel_cdclk.c max(cnl_calc_voltage_level(cdclk), cdclk 2548 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk = cnl_calc_cdclk(state->cdclk.force_min_cdclk); cdclk 2549 drivers/gpu/drm/i915/display/intel_cdclk.c vco = cnl_cdclk_pll_vco(dev_priv, cdclk); cdclk 2551 drivers/gpu/drm/i915/display/intel_cdclk.c state->cdclk.actual.vco = vco; cdclk 2552 drivers/gpu/drm/i915/display/intel_cdclk.c state->cdclk.actual.cdclk = cdclk; cdclk 2553 drivers/gpu/drm/i915/display/intel_cdclk.c state->cdclk.actual.voltage_level = cdclk 2554 drivers/gpu/drm/i915/display/intel_cdclk.c cnl_calc_voltage_level(cdclk); cdclk 2556 drivers/gpu/drm/i915/display/intel_cdclk.c state->cdclk.actual = state->cdclk.logical; cdclk 2565 drivers/gpu/drm/i915/display/intel_cdclk.c unsigned int ref = state->cdclk.logical.ref; cdclk 2566 drivers/gpu/drm/i915/display/intel_cdclk.c int min_cdclk, cdclk, vco; cdclk 2572 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk = icl_calc_cdclk(min_cdclk, ref); cdclk 2573 drivers/gpu/drm/i915/display/intel_cdclk.c vco = icl_calc_cdclk_pll_vco(dev_priv, cdclk); cdclk 2575 drivers/gpu/drm/i915/display/intel_cdclk.c state->cdclk.logical.vco = vco; cdclk 2576 drivers/gpu/drm/i915/display/intel_cdclk.c state->cdclk.logical.cdclk = cdclk; cdclk 2577 drivers/gpu/drm/i915/display/intel_cdclk.c state->cdclk.logical.voltage_level = cdclk 2578 drivers/gpu/drm/i915/display/intel_cdclk.c max(icl_calc_voltage_level(dev_priv, cdclk), cdclk 2582 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk = icl_calc_cdclk(state->cdclk.force_min_cdclk, ref); cdclk 2583 drivers/gpu/drm/i915/display/intel_cdclk.c vco = icl_calc_cdclk_pll_vco(dev_priv, cdclk); cdclk 2585 drivers/gpu/drm/i915/display/intel_cdclk.c state->cdclk.actual.vco = vco; cdclk 2586 drivers/gpu/drm/i915/display/intel_cdclk.c state->cdclk.actual.cdclk = cdclk; cdclk 2587 drivers/gpu/drm/i915/display/intel_cdclk.c state->cdclk.actual.voltage_level = cdclk 2588 drivers/gpu/drm/i915/display/intel_cdclk.c icl_calc_voltage_level(dev_priv, cdclk); cdclk 2590 drivers/gpu/drm/i915/display/intel_cdclk.c state->cdclk.actual = state->cdclk.logical; cdclk 2624 drivers/gpu/drm/i915/display/intel_cdclk.c if (dev_priv->cdclk.hw.ref == 24000) cdclk 2629 drivers/gpu/drm/i915/display/intel_cdclk.c if (dev_priv->cdclk.hw.ref == 24000) cdclk 2682 drivers/gpu/drm/i915/display/intel_cdclk.c dev_priv->max_cdclk_freq = dev_priv->cdclk.hw.cdclk; cdclk 2702 drivers/gpu/drm/i915/display/intel_cdclk.c dev_priv->display.get_cdclk(dev_priv, &dev_priv->cdclk.hw); cdclk 2712 drivers/gpu/drm/i915/display/intel_cdclk.c DIV_ROUND_UP(dev_priv->cdclk.hw.cdclk, 1000)); cdclk 1414 drivers/gpu/drm/i915/display/intel_ddi.c ref_clock = dev_priv->cdclk.hw.ref; cdclk 7356 drivers/gpu/drm/i915/display/intel_display.c crtc_state->pixel_rate > intel_state->cdclk.logical.cdclk * 95 / 100) cdclk 13472 drivers/gpu/drm/i915/display/intel_display.c if (!state->cdclk.force_min_cdclk_changed) cdclk 13473 drivers/gpu/drm/i915/display/intel_display.c state->cdclk.force_min_cdclk = dev_priv->cdclk.force_min_cdclk; cdclk 13477 drivers/gpu/drm/i915/display/intel_display.c state->cdclk.logical = dev_priv->cdclk.logical; cdclk 13478 drivers/gpu/drm/i915/display/intel_display.c state->cdclk.actual = dev_priv->cdclk.actual; cdclk 13479 drivers/gpu/drm/i915/display/intel_display.c state->cdclk.pipe = INVALID_PIPE; cdclk 13511 drivers/gpu/drm/i915/display/intel_display.c if (intel_cdclk_changed(&dev_priv->cdclk.logical, cdclk 13512 drivers/gpu/drm/i915/display/intel_display.c &state->cdclk.logical)) { cdclk 13534 drivers/gpu/drm/i915/display/intel_display.c &dev_priv->cdclk.actual, cdclk 13535 drivers/gpu/drm/i915/display/intel_display.c &state->cdclk.actual)) { cdclk 13540 drivers/gpu/drm/i915/display/intel_display.c state->cdclk.pipe = pipe; cdclk 13541 drivers/gpu/drm/i915/display/intel_display.c } else if (intel_cdclk_needs_modeset(&dev_priv->cdclk.actual, cdclk 13542 drivers/gpu/drm/i915/display/intel_display.c &state->cdclk.actual)) { cdclk 13547 drivers/gpu/drm/i915/display/intel_display.c state->cdclk.pipe = INVALID_PIPE; cdclk 13551 drivers/gpu/drm/i915/display/intel_display.c state->cdclk.logical.cdclk, cdclk 13552 drivers/gpu/drm/i915/display/intel_display.c state->cdclk.actual.cdclk); cdclk 13554 drivers/gpu/drm/i915/display/intel_display.c state->cdclk.logical.voltage_level, cdclk 13555 drivers/gpu/drm/i915/display/intel_display.c state->cdclk.actual.voltage_level); cdclk 13619 drivers/gpu/drm/i915/display/intel_display.c bool any_ms = state->cdclk.force_min_cdclk_changed; cdclk 13662 drivers/gpu/drm/i915/display/intel_display.c state->cdclk.logical = dev_priv->cdclk.logical; cdclk 13988 drivers/gpu/drm/i915/display/intel_display.c &state->cdclk.actual, cdclk 13989 drivers/gpu/drm/i915/display/intel_display.c &dev_priv->cdclk.actual, cdclk 13990 drivers/gpu/drm/i915/display/intel_display.c state->cdclk.pipe); cdclk 14026 drivers/gpu/drm/i915/display/intel_display.c &state->cdclk.actual, cdclk 14027 drivers/gpu/drm/i915/display/intel_display.c &dev_priv->cdclk.actual, cdclk 14028 drivers/gpu/drm/i915/display/intel_display.c state->cdclk.pipe); cdclk 14222 drivers/gpu/drm/i915/display/intel_display.c dev_priv->cdclk.force_min_cdclk = state->cdclk.force_min_cdclk; cdclk 14510 drivers/gpu/drm/i915/display/intel_display.c max_dotclk = to_intel_atomic_state(crtc_state->base.state)->cdclk.logical.cdclk; cdclk 15967 drivers/gpu/drm/i915/display/intel_display.c intel_dump_cdclk_state(&dev_priv->cdclk.hw, "Current CDCLK"); cdclk 15968 drivers/gpu/drm/i915/display/intel_display.c dev_priv->cdclk.logical = dev_priv->cdclk.actual = dev_priv->cdclk.hw; cdclk 974 drivers/gpu/drm/i915/display/intel_display_power.c WARN_ON(intel_cdclk_needs_modeset(&dev_priv->cdclk.hw, &cdclk_state)); cdclk 4407 drivers/gpu/drm/i915/display/intel_display_power.c intel_dump_cdclk_state(&dev_priv->cdclk.hw, "Current CDCLK"); cdclk 472 drivers/gpu/drm/i915/display/intel_display_types.h } cdclk; cdclk 1192 drivers/gpu/drm/i915/display/intel_dp.c return DIV_ROUND_CLOSEST(dev_priv->cdclk.hw.cdclk, 2000); cdclk 2259 drivers/gpu/drm/i915/display/intel_dpll_mgr.c int ref_clock = dev_priv->cdclk.hw.ref; cdclk 2543 drivers/gpu/drm/i915/display/intel_dpll_mgr.c dev_priv->cdclk.hw.ref == 24000 ? cdclk 2565 drivers/gpu/drm/i915/display/intel_dpll_mgr.c *pll_params = dev_priv->cdclk.hw.ref == 24000 ? cdclk 2701 drivers/gpu/drm/i915/display/intel_dpll_mgr.c int refclk_khz = dev_priv->cdclk.hw.ref; cdclk 3087 drivers/gpu/drm/i915/display/intel_dpll_mgr.c if (dev_priv->cdclk.hw.ref == 38400) { cdclk 770 drivers/gpu/drm/i915/display/intel_fbc.c cache->crtc.hsw_bdw_pixel_rate >= dev_priv->cdclk.hw.cdclk * 95 / 100) { cdclk 1463 drivers/gpu/drm/i915/display/intel_panel.c clock = KHz(dev_priv->cdclk.hw.cdclk); cdclk 1481 drivers/gpu/drm/i915/display/intel_panel.c clock = KHz(dev_priv->cdclk.hw.cdclk); cdclk 987 drivers/gpu/drm/i915/i915_debugfs.c seq_printf(m, "Current CD clock frequency: %d kHz\n", dev_priv->cdclk.hw.cdclk); cdclk 1278 drivers/gpu/drm/i915/i915_drv.h unsigned int cdclk, vco, ref, bypass; cdclk 1420 drivers/gpu/drm/i915/i915_drv.h } cdclk; cdclk 2809 drivers/gpu/drm/i915/intel_pm.c if (WARN_ON(intel_state->cdclk.logical.cdclk == 0)) cdclk 2818 drivers/gpu/drm/i915/intel_pm.c intel_state->cdclk.logical.cdclk); cdclk 4186 drivers/gpu/drm/i915/intel_pm.c dotclk = to_intel_atomic_state(state)->cdclk.logical.cdclk;