cctrl             110 arch/sparc/include/asm/leon.h 	u32 cctrl;
cctrl             111 arch/sparc/include/asm/leon.h 	__asm__ __volatile__("lda [%%g0] 2, %0\n\t" : "=r"(cctrl));
cctrl             112 arch/sparc/include/asm/leon.h 	return ((cctrl >> 23) & 1) && ((cctrl >> 17) & 1);
cctrl             231 drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c 	u32 cctrl;
cctrl             261 drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c 	cctrl = pll_get_cctrl(frac_start, false);
cctrl             279 drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c 	DBG("PLL_CCTRL: %u", cctrl);
cctrl             291 drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c 	cfg->com_pll_cctrl_mode0 = cctrl;
cctrl              35 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c 	u32 cctrl, sctrl;
cctrl             223 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c 		clk->cctrl = divs << 16;
cctrl             236 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c 		clk->cctrl = (P2 + 1) << 16;
cctrl             274 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c 		   clk->ccoef, clk->cpost, clk->cctrl);
cctrl             320 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c 		nvkm_mask(device, 0x4028, 0x00070000, clk->cctrl);
cctrl             325 drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.c 		nvkm_wr32(device, 0x4028, 0x80000000 | clk->cctrl);