ccic_parent_names  204 drivers/clk/mmp/clk-of-mmp2.c static const char *ccic_parent_names[] = {"pll1_2", "pll1_16", "vctcxo"};
ccic_parent_names  257 drivers/clk/mmp/clk-of-mmp2.c 	clk = mmp_clk_register_mix(NULL, "ccic0_mix_clk", ccic_parent_names,
ccic_parent_names  258 drivers/clk/mmp/clk-of-mmp2.c 					ARRAY_SIZE(ccic_parent_names),
ccic_parent_names  264 drivers/clk/mmp/clk-of-mmp2.c 	clk = mmp_clk_register_mix(NULL, "ccic1_mix_clk", ccic_parent_names,
ccic_parent_names  265 drivers/clk/mmp/clk-of-mmp2.c 					ARRAY_SIZE(ccic_parent_names),
ccic_parent_names  186 drivers/clk/mmp/clk-of-pxa168.c static const char *ccic_parent_names[] = {"pll1_2", "pll1_12"};
ccic_parent_names  193 drivers/clk/mmp/clk-of-pxa168.c 	{0, "ccic0_mux", ccic_parent_names, ARRAY_SIZE(ccic_parent_names), CLK_SET_RATE_PARENT, APMU_CCIC0, 6, 1, 0, &ccic0_lock},
ccic_parent_names  192 drivers/clk/mmp/clk-of-pxa910.c static const char *ccic_parent_names[] = {"pll1_2", "pll1_12"};
ccic_parent_names  199 drivers/clk/mmp/clk-of-pxa910.c 	{0, "ccic0_mux", ccic_parent_names, ARRAY_SIZE(ccic_parent_names), CLK_SET_RATE_PARENT, APMU_CCIC0, 6, 1, 0, &ccic0_lock},