cbcr_hor_scl_mode  315 drivers/gpu/drm/rockchip/rockchip_drm_vop.c 	uint16_t cbcr_hor_scl_mode = SCALE_NONE;
cbcr_hor_scl_mode  351 drivers/gpu/drm/rockchip/rockchip_drm_vop.c 		cbcr_hor_scl_mode = scl_get_scl_mode(cbcr_src_w, dst_w);
cbcr_hor_scl_mode  353 drivers/gpu/drm/rockchip/rockchip_drm_vop.c 		if (cbcr_hor_scl_mode == SCALE_DOWN)
cbcr_hor_scl_mode  397 drivers/gpu/drm/rockchip/rockchip_drm_vop.c 		val = scl_vop_cal_scale(cbcr_hor_scl_mode, cbcr_src_w,
cbcr_hor_scl_mode  406 drivers/gpu/drm/rockchip/rockchip_drm_vop.c 		VOP_SCL_SET_EXT(vop, win, cbcr_hor_scl_mode, cbcr_hor_scl_mode);
cbcr_hor_scl_mode  540 drivers/gpu/drm/rockchip/rockchip_drm_vop.c 		VOP_SCL_SET_EXT(vop, win, cbcr_hor_scl_mode, SCALE_NONE);
cbcr_hor_scl_mode   95 drivers/gpu/drm/rockchip/rockchip_drm_vop.h 	struct vop_reg cbcr_hor_scl_mode;
cbcr_hor_scl_mode  514 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.cbcr_hor_scl_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x3, 24),