catalog          1033 arch/powerpc/perf/hv-24x7.c static BIN_ATTR_RO(catalog, 0/* real length varies */);
catalog            73 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c 	if (!kms || !kms->catalog || !crtc || !state || !perf) {
catalog            82 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c 		perf->bw_ctl = kms->catalog->perf.max_bw_high *
catalog           119 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c 	if (!kms || !kms->catalog) {
catalog           161 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c 			kms->catalog->perf.max_bw_low :
catalog           162 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c 			kms->catalog->perf.max_bw_high;
catalog           227 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c 	if (!kms || !kms->catalog) {
catalog           300 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c 	if (!kms || !kms->catalog) {
catalog           390 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c 	struct dpu_perf_cfg *cfg = &perf->catalog->perf;
catalog           445 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c 	struct dpu_mdss_cfg *catalog = perf->catalog;
catalog           457 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c 			(u32 *)&catalog->perf.max_bw_low);
catalog           459 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c 			(u32 *)&catalog->perf.max_bw_high);
catalog           461 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c 			(u32 *)&catalog->perf.min_core_ib);
catalog           463 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c 			(u32 *)&catalog->perf.min_llcc_ib);
catalog           465 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c 			(u32 *)&catalog->perf.min_dram_ib);
catalog           488 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c 	perf->catalog = NULL;
catalog           494 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c 		struct dpu_mdss_cfg *catalog,
catalog           498 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c 	perf->catalog = catalog;
catalog            71 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h 	struct dpu_mdss_cfg *catalog;
catalog           122 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h 		struct dpu_mdss_cfg *catalog,
catalog          1117 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 				dpu_kms->catalog);
catalog          1246 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c static enum dpu_intf dpu_encoder_get_intf(struct dpu_mdss_cfg *catalog,
catalog          1251 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	for (i = 0; i < catalog->intf_count; i++) {
catalog          1252 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 		if (catalog->intf[i].type == type
catalog          1253 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 		    && catalog->intf[i].controller_id == controller_id) {
catalog          1254 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 			return catalog->intf[i].id;
catalog          2077 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 				dpu_kms->catalog->caps->has_idle_pc;
catalog          2100 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 		phys_params.intf_idx = dpu_encoder_get_intf(dpu_kms->catalog,
catalog           305 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c 		if (IS_UBWC_20_SUPPORTED(ctx->catalog->caps->ubwc_version)) {
catalog           671 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c 		struct dpu_mdss_cfg *catalog,
catalog           676 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c 	if ((sspp < SSPP_MAX) && catalog && addr && b) {
catalog           677 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c 		for (i = 0; i < catalog->sspp_count; i++) {
catalog           678 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c 			if (sspp == catalog->sspp[i].id) {
catalog           680 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c 				b->blk_off = catalog->sspp[i].base;
catalog           681 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c 				b->length = catalog->sspp[i].len;
catalog           682 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c 				b->hwversion = catalog->hwversion;
catalog           684 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c 				return &catalog->sspp[i];
catalog           695 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c 		void __iomem *addr, struct dpu_mdss_cfg *catalog,
catalog           701 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c 	if (!addr || !catalog)
catalog           708 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c 	cfg = _sspp_offset(idx, addr, catalog, &hw_pipe->hw);
catalog           715 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c 	hw_pipe->catalog = catalog;
catalog           716 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c 	hw_pipe->mdp = &catalog->mdp[0];
catalog           375 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h 	struct dpu_mdss_cfg *catalog;
catalog           395 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h 		void __iomem *addr, struct dpu_mdss_cfg *catalog,
catalog           504 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c 	struct dpu_mdss_cfg *catalog;
catalog           511 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c 	catalog = dpu_kms->catalog;
catalog           521 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c 	max_crtc_count = min(catalog->mixer_count, priv->num_encoders);
catalog           524 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c 	for (i = 0; i < catalog->sspp_count; i++) {
catalog           527 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c 		if ((catalog->sspp[i].features & BIT(DPU_SSPP_CURSOR))
catalog           536 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c 			  type, catalog->sspp[i].features,
catalog           537 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c 			  catalog->sspp[i].features & BIT(DPU_SSPP_CURSOR));
catalog           539 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c 		plane = dpu_plane_init(dev, catalog->sspp[i].id, type,
catalog           598 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c 	if (dpu_kms->catalog) {
catalog           599 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c 		for (i = 0; i < dpu_kms->catalog->vbif_count; i++) {
catalog           600 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c 			u32 vbif_idx = dpu_kms->catalog->vbif[i].id;
catalog           611 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c 	if (dpu_kms->catalog)
catalog           612 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c 		dpu_hw_catalog_deinit(dpu_kms->catalog);
catalog           613 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c 	dpu_kms->catalog = NULL;
catalog           860 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c 	dpu_kms->catalog = dpu_hw_catalog_init(dpu_kms->core_rev);
catalog           861 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c 	if (IS_ERR_OR_NULL(dpu_kms->catalog)) {
catalog           862 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c 		rc = PTR_ERR(dpu_kms->catalog);
catalog           863 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c 		if (!dpu_kms->catalog)
catalog           866 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c 		dpu_kms->catalog = NULL;
catalog           880 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c 	rc = dpu_rm_init(&dpu_kms->rm, dpu_kms->catalog, dpu_kms->mmio);
catalog           889 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c 					     dpu_kms->catalog);
catalog           897 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c 	for (i = 0; i < dpu_kms->catalog->vbif_count; i++) {
catalog           898 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c 		u32 vbif_idx = dpu_kms->catalog->vbif[i].id;
catalog           901 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c 				dpu_kms->vbif[vbif_idx], dpu_kms->catalog);
catalog           912 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c 	rc = dpu_core_perf_init(&dpu_kms->perf, dev, dpu_kms->catalog,
catalog           919 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c 	dpu_kms->hw_intr = dpu_hw_intr_init(dpu_kms->mmio, dpu_kms->catalog);
catalog           935 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c 			dpu_kms->catalog->caps->max_mixer_width * 2;
catalog            99 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h 	struct dpu_mdss_cfg *catalog;
catalog            99 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 	struct dpu_mdss_cfg *catalog;
catalog           246 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 			&pdpu->catalog->perf.qos_lut_tbl[lut_usage], total_fl);
catalog           276 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 		danger_lut = pdpu->catalog->perf.danger_lut_tbl
catalog           278 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 		safe_lut = pdpu->catalog->perf.safe_lut_tbl
catalog           286 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 			danger_lut = pdpu->catalog->perf.danger_lut_tbl
catalog           288 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 			safe_lut = pdpu->catalog->perf.safe_lut_tbl
catalog           291 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 			danger_lut = pdpu->catalog->perf.danger_lut_tbl
catalog           293 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 			safe_lut = pdpu->catalog->perf.safe_lut_tbl
catalog          1064 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 			cdp_cfg->enable = pdpu->catalog->perf.cdp_cfg
catalog          1488 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 	pdpu->pipe_hw = dpu_hw_sspp_init(pipe, kms->mmio, kms->catalog,
catalog          1522 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 	pdpu->catalog = kms->catalog;
catalog          1524 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 	if (kms->catalog->mixer_count &&
catalog          1525 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 		kms->catalog->mixer[0].sblk->maxblendstages) {
catalog          1526 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 		zpos_max = kms->catalog->mixer[0].sblk->maxblendstages - 1;
catalog           305 drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.c 	for (i = 0; i < dpu_kms->catalog->vbif_count; i++) {
catalog           306 drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.c 		struct dpu_vbif_cfg *vbif = &dpu_kms->catalog->vbif[i];