cap2              748 arch/powerpc/kernel/eeh.c 	u32 devctl, cmd, cap2, aer_capctl;
cap2              763 arch/powerpc/kernel/eeh.c 				     4, &cap2);
cap2              764 arch/powerpc/kernel/eeh.c 		if (cap2 & PCI_EXP_DEVCAP2_COMP_TMOUT_DIS) {
cap2              767 arch/powerpc/kernel/eeh.c 					     4, &cap2);
cap2              768 arch/powerpc/kernel/eeh.c 			cap2 |= PCI_EXP_DEVCTL2_COMP_TMOUT_DIS;
cap2              771 arch/powerpc/kernel/eeh.c 					      4, cap2);
cap2              330 drivers/ata/ahci.h 	u32			cap2;		/* cap2 to use */
cap2              255 drivers/ata/libahci.c 	return sprintf(buf, "%x\n", hpriv->cap2);
cap2              427 drivers/ata/libahci.c 	u32 cap, cap2, vers, port_map;
cap2              443 drivers/ata/libahci.c 		hpriv->saved_cap2 = cap2 = readl(mmio + HOST_CAP2);
cap2              445 drivers/ata/libahci.c 		hpriv->saved_cap2 = cap2 = 0;
cap2              474 drivers/ata/libahci.c 	if ((cap2 & HOST_CAP2_SDS) && (hpriv->flags & AHCI_HFLAG_NO_DEVSLP)) {
cap2              477 drivers/ata/libahci.c 		cap2 &= ~HOST_CAP2_SDS;
cap2              478 drivers/ata/libahci.c 		cap2 &= ~HOST_CAP2_SADM;
cap2              540 drivers/ata/libahci.c 	hpriv->cap2 = cap2;
cap2              796 drivers/ata/libahci.c 	if ((hpriv->cap2 & HOST_CAP2_SDS) &&
cap2              797 drivers/ata/libahci.c 	    (hpriv->cap2 & HOST_CAP2_SADM) &&
cap2             2438 drivers/ata/libahci.c 	u32 vers, cap, cap2, impl, speed;
cap2             2443 drivers/ata/libahci.c 	cap2 = hpriv->cap2;
cap2             2497 drivers/ata/libahci.c 		cap2 & HOST_CAP2_DESO ? "deso " : "",
cap2             2498 drivers/ata/libahci.c 		cap2 & HOST_CAP2_SADM ? "sadm " : "",
cap2             2499 drivers/ata/libahci.c 		cap2 & HOST_CAP2_SDS ? "sds " : "",
cap2             2500 drivers/ata/libahci.c 		cap2 & HOST_CAP2_APST ? "apst " : "",
cap2             2501 drivers/ata/libahci.c 		cap2 & HOST_CAP2_NVMHCI ? "nvmp " : "",
cap2             2502 drivers/ata/libahci.c 		cap2 & HOST_CAP2_BOH ? "boh " : ""
cap2              663 drivers/char/tpm/tpm_tis_core.c 	u32 cap2;
cap2              667 drivers/char/tpm/tpm_tis_core.c 		return tpm2_get_tpm_pt(chip, 0x100, &cap2, desc);
cap2              231 drivers/pci/vc.c 		u32 cap2;
cap2              234 drivers/pci/vc.c 		pci_read_config_dword(dev, pos + PCI_VC_PORT_CAP2, &cap2);
cap2              235 drivers/pci/vc.c 		vcarb_offset = ((cap2 & PCI_VC_CAP2_ARB_OFF) >> 24) * 16;
cap2              240 drivers/pci/vc.c 			if (cap2 & PCI_VC_CAP2_128_PHASE)
cap2              242 drivers/pci/vc.c 			else if (cap2 & PCI_VC_CAP2_64_PHASE)
cap2              244 drivers/pci/vc.c 			else if (cap2 & PCI_VC_CAP2_32_PHASE)
cap2              800 drivers/usb/host/ehci-dbg.c 		u32		offset, cap, cap2;
cap2              818 drivers/usb/host/ehci-dbg.c 				pci_read_config_dword(pdev, offset, &cap2);
cap2              820 drivers/usb/host/ehci-dbg.c 					"SMI sts/enable 0x%08x\n", cap2);