calc_pll_cs       136 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		struct calc_pll_clock_source *calc_pll_cs,
calc_pll_cs       149 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	feedback_divider *= (uint64_t)(calc_pll_cs->fract_fb_divider_factor);
calc_pll_cs       150 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	feedback_divider = div_u64(feedback_divider, calc_pll_cs->ref_freq_khz * 10ull);
calc_pll_cs       159 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 			    calc_pll_cs->fract_fb_divider_precision_factor;
calc_pll_cs       162 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 			calc_pll_cs->fract_fb_divider_precision_factor * 10);
calc_pll_cs       164 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 			(calc_pll_cs->fract_fb_divider_precision_factor);
calc_pll_cs       169 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 			calc_pll_cs->fract_fb_divider_factor,
calc_pll_cs       195 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		struct calc_pll_clock_source *calc_pll_cs,
calc_pll_cs       208 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 			calc_pll_cs,
calc_pll_cs       217 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 					calc_pll_cs->fract_fb_divider_factor +
calc_pll_cs       219 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	actual_calc_clk_100hz *= calc_pll_cs->ref_freq_khz * 10;
calc_pll_cs       223 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 				calc_pll_cs->fract_fb_divider_factor);
calc_pll_cs       236 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		pll_settings->reference_freq = calc_pll_cs->ref_freq_khz;
calc_pll_cs       251 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		struct calc_pll_clock_source *calc_pll_cs,
calc_pll_cs       279 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 					calc_pll_cs,
calc_pll_cs       293 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		struct calc_pll_clock_source *calc_pll_cs,
calc_pll_cs       313 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		min_post_divider = calc_pll_cs->min_pix_clock_pll_post_divider;
calc_pll_cs       315 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 						calc_pll_cs->min_vco_khz * 10) {
calc_pll_cs       316 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 			min_post_divider = calc_pll_cs->min_vco_khz * 10 /
calc_pll_cs       320 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 						calc_pll_cs->min_vco_khz * 10)
calc_pll_cs       324 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		max_post_divider = calc_pll_cs->max_pix_clock_pll_post_divider;
calc_pll_cs       326 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 				> calc_pll_cs->max_vco_khz * 10)
calc_pll_cs       327 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 			max_post_divider = calc_pll_cs->max_vco_khz * 10 /
calc_pll_cs       341 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		min_ref_divider = ((calc_pll_cs->ref_freq_khz
calc_pll_cs       342 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 				/ calc_pll_cs->max_pll_input_freq_khz)
calc_pll_cs       343 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 				> calc_pll_cs->min_pll_ref_divider)
calc_pll_cs       344 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 			? calc_pll_cs->ref_freq_khz
calc_pll_cs       345 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 					/ calc_pll_cs->max_pll_input_freq_khz
calc_pll_cs       346 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 			: calc_pll_cs->min_pll_ref_divider;
calc_pll_cs       348 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		max_ref_divider = ((calc_pll_cs->ref_freq_khz
calc_pll_cs       349 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 				/ calc_pll_cs->min_pll_input_freq_khz)
calc_pll_cs       350 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 				< calc_pll_cs->max_pll_ref_divider)
calc_pll_cs       351 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 			? calc_pll_cs->ref_freq_khz /
calc_pll_cs       352 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 					calc_pll_cs->min_pll_input_freq_khz
calc_pll_cs       353 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 			: calc_pll_cs->max_pll_ref_divider;
calc_pll_cs       381 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 			calc_pll_cs,
calc_pll_cs      1234 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 			struct calc_pll_clock_source *calc_pll_cs,
calc_pll_cs      1239 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	if (calc_pll_cs == NULL ||
calc_pll_cs      1248 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	calc_pll_cs->ctx = init_data->ctx;
calc_pll_cs      1249 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	calc_pll_cs->ref_freq_khz = fw_info->pll_info.crystal_frequency;
calc_pll_cs      1250 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	calc_pll_cs->min_vco_khz =
calc_pll_cs      1252 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	calc_pll_cs->max_vco_khz =
calc_pll_cs      1256 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		calc_pll_cs->max_pll_input_freq_khz =
calc_pll_cs      1259 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		calc_pll_cs->max_pll_input_freq_khz =
calc_pll_cs      1263 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		calc_pll_cs->min_pll_input_freq_khz =
calc_pll_cs      1266 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		calc_pll_cs->min_pll_input_freq_khz =
calc_pll_cs      1269 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	calc_pll_cs->min_pix_clock_pll_post_divider =
calc_pll_cs      1271 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	calc_pll_cs->max_pix_clock_pll_post_divider =
calc_pll_cs      1273 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	calc_pll_cs->min_pll_ref_divider =
calc_pll_cs      1275 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	calc_pll_cs->max_pll_ref_divider =
calc_pll_cs      1291 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	calc_pll_cs->fract_fb_divider_decimal_points_num =
calc_pll_cs      1293 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	calc_pll_cs->fract_fb_divider_precision =
calc_pll_cs      1295 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	calc_pll_cs->fract_fb_divider_factor = 1;
calc_pll_cs      1296 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	for (i = 0; i < calc_pll_cs->fract_fb_divider_decimal_points_num; ++i)
calc_pll_cs      1297 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		calc_pll_cs->fract_fb_divider_factor *= 10;
calc_pll_cs      1299 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	calc_pll_cs->fract_fb_divider_precision_factor = 1;
calc_pll_cs      1302 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		i < (calc_pll_cs->fract_fb_divider_decimal_points_num -
calc_pll_cs      1303 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 				calc_pll_cs->fract_fb_divider_precision);
calc_pll_cs      1305 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		calc_pll_cs->fract_fb_divider_precision_factor *= 10;