cal_cfg10         137 drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm.c 	u32 cal_cfg10, cal_cfg11;
cal_cfg10         208 drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm.c 	cal_cfg10 = (u32)((gen_vco_clk % (256 * 1000000)) / 1000000);
cal_cfg10         209 drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm.c 	DBG("cal_cfg10=%d, cal_cfg11=%d", cal_cfg10, cal_cfg11);
cal_cfg10         236 drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm.c 	pll_write(base + REG_DSI_28nm_PHY_PLL_CAL_CFG10,  cal_cfg10 & 0xff);