cache_level 1759 arch/arm/mm/cache-l2x0.c u32 cache_level = 2; cache_level 1793 arch/arm/mm/cache-l2x0.c if (of_property_read_u32(np, "cache-level", &cache_level)) cache_level 1796 arch/arm/mm/cache-l2x0.c if (cache_level != 2) cache_level 314 arch/arm/mm/cache-uniphier.c unsigned int *cache_level) cache_level 323 arch/arm/mm/cache-uniphier.c *cache_level); cache_level 328 arch/arm/mm/cache-uniphier.c pr_err("L%d: cache-level is not specified\n", *cache_level); cache_level 332 arch/arm/mm/cache-uniphier.c if (level != *cache_level) { cache_level 334 arch/arm/mm/cache-uniphier.c *cache_level, level); cache_level 339 arch/arm/mm/cache-uniphier.c pr_err("L%d: cache-unified is not specified\n", *cache_level); cache_level 350 arch/arm/mm/cache-uniphier.c *cache_level); cache_level 358 arch/arm/mm/cache-uniphier.c *cache_level); cache_level 366 arch/arm/mm/cache-uniphier.c *cache_level); cache_level 376 arch/arm/mm/cache-uniphier.c pr_err("L%d: failed to map control register\n", *cache_level); cache_level 383 arch/arm/mm/cache-uniphier.c pr_err("L%d: failed to map revision register\n", *cache_level); cache_level 390 arch/arm/mm/cache-uniphier.c pr_err("L%d: failed to map operation register\n", *cache_level); cache_level 397 arch/arm/mm/cache-uniphier.c if (*cache_level == 2) { cache_level 436 arch/arm/mm/cache-uniphier.c (*cache_level)++; cache_level 437 arch/arm/mm/cache-uniphier.c ret = __uniphier_cache_init(next_np, cache_level); cache_level 454 arch/arm/mm/cache-uniphier.c unsigned int cache_level; cache_level 459 arch/arm/mm/cache-uniphier.c if (!of_property_read_u32(np, "cache-level", &cache_level) && cache_level 460 arch/arm/mm/cache-uniphier.c cache_level == 2) cache_level 466 arch/arm/mm/cache-uniphier.c ret = __uniphier_cache_init(np, &cache_level); cache_level 474 arch/arm/mm/cache-uniphier.c if (cache_level == 2) { cache_level 479 arch/arm/mm/cache-uniphier.c cache_level--; cache_level 492 arch/arm/mm/cache-uniphier.c pr_info("enabled outer cache (cache level: %d)\n", cache_level); cache_level 908 arch/ia64/include/asm/pal.h ia64_pal_cache_config_info (u64 cache_level, u64 cache_type, pal_cache_config_info_t *conf) cache_level 912 arch/ia64/include/asm/pal.h PAL_CALL(iprv, PAL_CACHE_INFO, cache_level, cache_type, 0); cache_level 926 arch/ia64/include/asm/pal.h ia64_pal_cache_prot_info (u64 cache_level, u64 cache_type, pal_cache_protection_info_t *prot) cache_level 930 arch/ia64/include/asm/pal.h PAL_CALL(iprv, PAL_CACHE_PROT_INFO, cache_level, cache_type, 0); cache_level 70 arch/x86/kernel/cpu/resctrl/core.c .cache_level = 3, cache_level 87 arch/x86/kernel/cpu/resctrl/core.c .cache_level = 3, cache_level 104 arch/x86/kernel/cpu/resctrl/core.c .cache_level = 3, cache_level 121 arch/x86/kernel/cpu/resctrl/core.c .cache_level = 2, cache_level 138 arch/x86/kernel/cpu/resctrl/core.c .cache_level = 2, cache_level 155 arch/x86/kernel/cpu/resctrl/core.c .cache_level = 2, cache_level 170 arch/x86/kernel/cpu/resctrl/core.c .cache_level = 3, cache_level 559 arch/x86/kernel/cpu/resctrl/core.c int id = get_cache_id(cpu, r->cache_level); cache_level 605 arch/x86/kernel/cpu/resctrl/core.c int id = get_cache_id(cpu, r->cache_level); cache_level 446 arch/x86/kernel/cpu/resctrl/internal.h int cache_level; cache_level 296 arch/x86/kernel/cpu/resctrl/pseudo_lock.c if (ci->info_list[i].level == plr->r->cache_level) { cache_level 1268 arch/x86/kernel/cpu/resctrl/rdtgroup.c if (ci->info_list[i].level == r->cache_level) { cache_level 54 drivers/gpu/drm/amd/amdkfd/kfd_crat.c uint32_t cache_level; cache_level 66 drivers/gpu/drm/amd/amdkfd/kfd_crat.c .cache_level = 1, cache_level 76 drivers/gpu/drm/amd/amdkfd/kfd_crat.c .cache_level = 1, cache_level 85 drivers/gpu/drm/amd/amdkfd/kfd_crat.c .cache_level = 1, cache_level 100 drivers/gpu/drm/amd/amdkfd/kfd_crat.c .cache_level = 1, cache_level 109 drivers/gpu/drm/amd/amdkfd/kfd_crat.c .cache_level = 1, cache_level 118 drivers/gpu/drm/amd/amdkfd/kfd_crat.c .cache_level = 1, cache_level 318 drivers/gpu/drm/amd/amdkfd/kfd_crat.c props->cache_level = cache->cache_level; cache_level 576 drivers/gpu/drm/amd/amdkfd/kfd_crat.c pcache->cache_level = pcache_info[cache_type].cache_level; cache_level 164 drivers/gpu/drm/amd/amdkfd/kfd_crat.h uint8_t cache_level; cache_level 339 drivers/gpu/drm/amd/amdkfd/kfd_topology.c sysfs_show_32bit_prop(buffer, "level", cache->cache_level); cache_level 118 drivers/gpu/drm/amd/amdkfd/kfd_topology.h uint32_t cache_level; cache_level 37 drivers/gpu/drm/i915/gem/i915_gem_client_blt.c enum i915_cache_level cache_level, cache_level 40 drivers/gpu/drm/i915/gem/i915_gem_client_blt.c return vma->vm->vma_ops.bind_vma(vma, cache_level, flags); cache_level 176 drivers/gpu/drm/i915/gem/i915_gem_domain.c enum i915_cache_level cache_level) cache_level 183 drivers/gpu/drm/i915/gem/i915_gem_domain.c if (obj->cache_level == cache_level) cache_level 202 drivers/gpu/drm/i915/gem/i915_gem_domain.c i915_gem_valid_gtt_space(vma, cache_level)) cache_level 237 drivers/gpu/drm/i915/gem/i915_gem_domain.c if (!HAS_LLC(i915) && cache_level != I915_CACHE_NONE) { cache_level 291 drivers/gpu/drm/i915/gem/i915_gem_domain.c ret = i915_vma_bind(vma, cache_level, PIN_UPDATE); cache_level 298 drivers/gpu/drm/i915/gem/i915_gem_domain.c vma->node.color = cache_level; cache_level 299 drivers/gpu/drm/i915/gem/i915_gem_domain.c i915_gem_object_set_cache_coherency(obj, cache_level); cache_level 319 drivers/gpu/drm/i915/gem/i915_gem_domain.c switch (obj->cache_level) { cache_level 383 drivers/gpu/drm/i915/gem/i915_gem_domain.c if (obj->cache_level == level) cache_level 577 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c obj->cache_level != I915_CACHE_NONE); cache_level 1395 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c err = i915_vma_bind(target, target->obj->cache_level, cache_level 176 drivers/gpu/drm/i915/gem/i915_gem_internal.c unsigned int cache_level; cache_level 194 drivers/gpu/drm/i915/gem/i915_gem_internal.c cache_level = HAS_LLC(i915) ? I915_CACHE_LLC : I915_CACHE_NONE; cache_level 195 drivers/gpu/drm/i915/gem/i915_gem_internal.c i915_gem_object_set_cache_coherency(obj, cache_level); cache_level 257 drivers/gpu/drm/i915/gem/i915_gem_mman.c if (obj->cache_level != I915_CACHE_NONE && !HAS_LLC(i915)) { cache_level 76 drivers/gpu/drm/i915/gem/i915_gem_object.c unsigned int cache_level) cache_level 78 drivers/gpu/drm/i915/gem/i915_gem_object.c obj->cache_level = cache_level; cache_level 80 drivers/gpu/drm/i915/gem/i915_gem_object.c if (cache_level != I915_CACHE_NONE) cache_level 253 drivers/gpu/drm/i915/gem/i915_gem_object.c return !(obj->cache_level == I915_CACHE_NONE || cache_level 254 drivers/gpu/drm/i915/gem/i915_gem_object.c obj->cache_level == I915_CACHE_WT); cache_level 387 drivers/gpu/drm/i915/gem/i915_gem_object.h unsigned int cache_level); cache_level 125 drivers/gpu/drm/i915/gem/i915_gem_object_types.h unsigned int cache_level:3; cache_level 463 drivers/gpu/drm/i915/gem/i915_gem_shmem.c unsigned int cache_level; cache_level 515 drivers/gpu/drm/i915/gem/i915_gem_shmem.c cache_level = I915_CACHE_LLC; cache_level 517 drivers/gpu/drm/i915/gem/i915_gem_shmem.c cache_level = I915_CACHE_NONE; cache_level 519 drivers/gpu/drm/i915/gem/i915_gem_shmem.c i915_gem_object_set_cache_coherency(obj, cache_level); cache_level 552 drivers/gpu/drm/i915/gem/i915_gem_stolen.c unsigned int cache_level; cache_level 563 drivers/gpu/drm/i915/gem/i915_gem_stolen.c cache_level = HAS_LLC(dev_priv) ? I915_CACHE_LLC : I915_CACHE_NONE; cache_level 564 drivers/gpu/drm/i915/gem/i915_gem_stolen.c i915_gem_object_set_cache_coherency(obj, cache_level); cache_level 678 drivers/gpu/drm/i915/gem/i915_gem_stolen.c size, gtt_offset, obj->cache_level, cache_level 100 drivers/gpu/drm/i915/gem/selftests/huge_gem_object.c unsigned int cache_level; cache_level 118 drivers/gpu/drm/i915/gem/selftests/huge_gem_object.c cache_level = HAS_LLC(i915) ? I915_CACHE_LLC : I915_CACHE_NONE; cache_level 119 drivers/gpu/drm/i915/gem/selftests/huge_gem_object.c i915_gem_object_set_cache_coherency(obj, cache_level); cache_level 173 drivers/gpu/drm/i915/gem/selftests/huge_pages.c obj->cache_level = I915_CACHE_NONE; cache_level 326 drivers/gpu/drm/i915/gem/selftests/huge_pages.c obj->cache_level = I915_CACHE_NONE; cache_level 152 drivers/gpu/drm/i915/i915_debugfs.c i915_cache_level_str(dev_priv, obj->cache_level), cache_level 2352 drivers/gpu/drm/i915/i915_drv.h enum i915_cache_level cache_level); cache_level 2382 drivers/gpu/drm/i915/i915_drv.h unsigned cache_level, cache_level 94 drivers/gpu/drm/i915/i915_gem_evict.c unsigned cache_level, cache_level 127 drivers/gpu/drm/i915/i915_gem_evict.c min_size, alignment, cache_level, cache_level 146 drivers/gpu/drm/i915/i915_gem_gtt.c enum i915_cache_level cache_level, cache_level 164 drivers/gpu/drm/i915/i915_gem_gtt.c vma->vm->insert_entries(vma->vm, vma, cache_level, pte_flags); cache_level 1171 drivers/gpu/drm/i915/i915_gem_gtt.c enum i915_cache_level cache_level, cache_level 1175 drivers/gpu/drm/i915/i915_gem_gtt.c const gen8_pte_t pte_encode = gen8_pte_encode(0, cache_level, flags); cache_level 1216 drivers/gpu/drm/i915/i915_gem_gtt.c enum i915_cache_level cache_level, cache_level 1219 drivers/gpu/drm/i915/i915_gem_gtt.c const gen8_pte_t pte_encode = gen8_pte_encode(0, cache_level, flags); cache_level 1336 drivers/gpu/drm/i915/i915_gem_gtt.c enum i915_cache_level cache_level, cache_level 1343 drivers/gpu/drm/i915/i915_gem_gtt.c gen8_ppgtt_insert_huge(vma, &iter, cache_level, flags); cache_level 1352 drivers/gpu/drm/i915/i915_gem_gtt.c cache_level, flags); cache_level 1645 drivers/gpu/drm/i915/i915_gem_gtt.c enum i915_cache_level cache_level, cache_level 1653 drivers/gpu/drm/i915/i915_gem_gtt.c const u32 pte_encode = vm->pte_encode(0, cache_level, flags); cache_level 1817 drivers/gpu/drm/i915/i915_gem_gtt.c enum i915_cache_level cache_level, cache_level 2402 drivers/gpu/drm/i915/i915_gem_gtt.c enum i915_cache_level cache_level, cache_level 2405 drivers/gpu/drm/i915/i915_gem_gtt.c unsigned int flags = (cache_level == I915_CACHE_NONE) ? cache_level 2413 drivers/gpu/drm/i915/i915_gem_gtt.c enum i915_cache_level cache_level, cache_level 2416 drivers/gpu/drm/i915/i915_gem_gtt.c unsigned int flags = (cache_level == I915_CACHE_NONE) ? cache_level 2430 drivers/gpu/drm/i915/i915_gem_gtt.c enum i915_cache_level cache_level, cache_level 2444 drivers/gpu/drm/i915/i915_gem_gtt.c vma->vm->insert_entries(vma->vm, vma, cache_level, pte_flags); cache_level 2468 drivers/gpu/drm/i915/i915_gem_gtt.c enum i915_cache_level cache_level, cache_level 2492 drivers/gpu/drm/i915/i915_gem_gtt.c cache_level, pte_flags); cache_level 2500 drivers/gpu/drm/i915/i915_gem_gtt.c cache_level, pte_flags); cache_level 3328 drivers/gpu/drm/i915/i915_gem_gtt.c obj ? obj->cache_level : 0, cache_level 271 drivers/gpu/drm/i915/i915_gem_gtt.h enum i915_cache_level cache_level, cache_level 351 drivers/gpu/drm/i915/i915_gem_gtt.h enum i915_cache_level cache_level, cache_level 355 drivers/gpu/drm/i915/i915_gem_gtt.h enum i915_cache_level cache_level, cache_level 304 drivers/gpu/drm/i915/i915_vma.c int i915_vma_bind(struct i915_vma *vma, enum i915_cache_level cache_level, cache_level 339 drivers/gpu/drm/i915/i915_vma.c ret = vma->ops->bind_vma(vma, cache_level, bind_flags); cache_level 485 drivers/gpu/drm/i915/i915_vma.c bool i915_gem_valid_gtt_space(struct i915_vma *vma, unsigned long cache_level) cache_level 505 drivers/gpu/drm/i915/i915_vma.c if (color_differs(other, cache_level) && !drm_mm_hole_follows(other)) cache_level 509 drivers/gpu/drm/i915/i915_vma.c if (color_differs(other, cache_level) && !drm_mm_hole_follows(node)) cache_level 545 drivers/gpu/drm/i915/i915_vma.c unsigned int cache_level; cache_level 591 drivers/gpu/drm/i915/i915_vma.c cache_level = vma->obj->cache_level; cache_level 593 drivers/gpu/drm/i915/i915_vma.c cache_level = 0; cache_level 611 drivers/gpu/drm/i915/i915_vma.c size, offset, cache_level, cache_level 650 drivers/gpu/drm/i915/i915_vma.c size, alignment, cache_level, cache_level 659 drivers/gpu/drm/i915/i915_vma.c GEM_BUG_ON(!i915_gem_valid_gtt_space(vma, cache_level)); cache_level 734 drivers/gpu/drm/i915/i915_vma.c ret = i915_vma_bind(vma, vma->obj ? vma->obj->cache_level : 0, flags); cache_level 296 drivers/gpu/drm/i915/i915_vma.h int i915_vma_bind(struct i915_vma *vma, enum i915_cache_level cache_level, cache_level 298 drivers/gpu/drm/i915/i915_vma.h bool i915_gem_valid_gtt_space(struct i915_vma *vma, unsigned long cache_level); cache_level 133 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c obj->cache_level = I915_CACHE_NONE; cache_level 1336 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c obj->cache_level, cache_level 1386 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c obj->cache_level, cache_level 1430 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c obj->cache_level, cache_level 1541 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c obj->base.size, 0, obj->cache_level, cache_level 1599 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c obj->base.size, 0, obj->cache_level, cache_level 1646 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c obj->base.size, 0, obj->cache_level, cache_level 42 drivers/gpu/drm/i915/selftests/mock_gtt.c enum i915_cache_level cache_level, cache_level 86 drivers/gpu/drm/i915/selftests/mock_gtt.c enum i915_cache_level cache_level, cache_level 513 drivers/iommu/fsl_pamu.c u32 cache_level; cache_level 546 drivers/iommu/fsl_pamu.c for (cache_level = PAMU_ATTR_CACHE_L1; (cache_level < PAMU_ATTR_CACHE_L3) && found; cache_level++) { cache_level 547 drivers/iommu/fsl_pamu.c if (stash_dest_hint == cache_level) { cache_level 2227 drivers/of/base.c u32 cache_level = 0; cache_level 2236 drivers/of/base.c of_property_read_u32(prev, "cache-level", &cache_level); cache_level 2238 drivers/of/base.c return cache_level;