c9 34 arch/arm/include/asm/arch_gicv3.h #define __ICC_AP1Rx(x) __ACCESS_CP15(c12, 0, c9, x) c9 40 arch/arm/include/asm/arch_gicv3.h #define ICC_HSRE __ACCESS_CP15(c12, 4, c9, 5) c9 42 arch/arm/include/asm/arch_gicv3.h #define ICH_VSEIR __ACCESS_CP15(c12, 4, c9, 4) c9 97 arch/arm/include/asm/arch_gicv3.h #define __ICH_AP1Rx(x) __ACCESS_CP15(c12, 4, c9, x) c9 50 arch/arm/include/asm/hardware/cp14.h #define RCP14_DBGECR() MRC14(0, c0, c9, 0) c9 66 arch/arm/include/asm/hardware/cp14.h #define RCP14_DBGBVR9() MRC14(0, c0, c9, 4) c9 82 arch/arm/include/asm/hardware/cp14.h #define RCP14_DBGBCR9() MRC14(0, c0, c9, 5) c9 98 arch/arm/include/asm/hardware/cp14.h #define RCP14_DBGWVR9() MRC14(0, c0, c9, 6) c9 114 arch/arm/include/asm/hardware/cp14.h #define RCP14_DBGWCR9() MRC14(0, c0, c9, 7) c9 131 arch/arm/include/asm/hardware/cp14.h #define RCP14_DBGBXVR9() MRC14(0, c1, c9, 1) c9 146 arch/arm/include/asm/hardware/cp14.h #define RCP14_DBGCLAIMCLR() MRC14(0, c7, c9, 6) c9 155 arch/arm/include/asm/hardware/cp14.h #define WCP14_DBGECR(val) MCR14(val, 0, c0, c9, 0) c9 171 arch/arm/include/asm/hardware/cp14.h #define WCP14_DBGBVR9(val) MCR14(val, 0, c0, c9, 4) c9 187 arch/arm/include/asm/hardware/cp14.h #define WCP14_DBGBCR9(val) MCR14(val, 0, c0, c9, 5) c9 203 arch/arm/include/asm/hardware/cp14.h #define WCP14_DBGWVR9(val) MCR14(val, 0, c0, c9, 6) c9 219 arch/arm/include/asm/hardware/cp14.h #define WCP14_DBGWCR9(val) MCR14(val, 0, c0, c9, 7) c9 235 arch/arm/include/asm/hardware/cp14.h #define WCP14_DBGBXVR9(val) MCR14(val, 0, c1, c9, 1) c9 248 arch/arm/include/asm/hardware/cp14.h #define WCP14_DBGCLAIMCLR(val) MCR14(val, 0, c7, c9, 6) c9 282 arch/arm/include/asm/hardware/cp14.h #define RCP14_ETMTECR1() MRC14(1, c0, c9, 0) c9 298 arch/arm/include/asm/hardware/cp14.h #define RCP14_ETMACVR9() MRC14(1, c0, c9, 1) c9 314 arch/arm/include/asm/hardware/cp14.h #define RCP14_ETMACTR9() MRC14(1, c0, c9, 2) c9 346 arch/arm/include/asm/hardware/cp14.h #define RCP14_ETMCNTRLDEVR1() MRC14(1, c0, c9, 5) c9 361 arch/arm/include/asm/hardware/cp14.h #define RCP14_ETMEXTOUTEVR1() MRC14(1, c0, c9, 6) c9 377 arch/arm/include/asm/hardware/cp14.h #define RCP14_ETMIDR() MRC14(1, c0, c9, 7) c9 394 arch/arm/include/asm/hardware/cp14.h #define RCP14_ETMCLAIMCLR() MRC14(1, c7, c9, 6) c9 404 arch/arm/include/asm/hardware/cp14.h #define RCP14_ETMPIDR1() MRC14(1, c7, c9, 7) c9 419 arch/arm/include/asm/hardware/cp14.h #define WCP14_ETMTECR1(val) MCR14(val, 1, c0, c9, 0) c9 435 arch/arm/include/asm/hardware/cp14.h #define WCP14_ETMACVR9(val) MCR14(val, 1, c0, c9, 1) c9 451 arch/arm/include/asm/hardware/cp14.h #define WCP14_ETMACTR9(val) MCR14(val, 1, c0, c9, 2) c9 483 arch/arm/include/asm/hardware/cp14.h #define WCP14_ETMCNTRLDEVR1(val) MCR14(val, 1, c0, c9, 5) c9 498 arch/arm/include/asm/hardware/cp14.h #define WCP14_ETMEXTOUTEVR1(val) MCR14(val, 1, c0, c9, 6) c9 530 arch/arm/include/asm/hardware/cp14.h #define WCP14_ETMCLAIMCLR(val) MCR14(val, 1, c7, c9, 6) c9 243 arch/x86/events/intel/cstate.c PMU_EVENT_ATTR_STRING(c9-residency, attr_cstate_pkg_c9, "event=0x05"); c9 111 drivers/gpu/drm/vc4/vc4_hvs.c c9, c10, c11, c12, c13, c14, c15) \ c9 115 drivers/gpu/drm/vc4/vc4_hvs.c VC4_PPF_FILTER_WORD(c9, c10, c11), \ c9 212 drivers/scsi/device_handler/scsi_dh_rdac.c struct c9_inquiry c9; c9 392 drivers/scsi/device_handler/scsi_dh_rdac.c struct c9_inquiry *inqp = &h->inq.c9; c9 39 tools/perf/arch/s390/include/dwarf-regs-table.h REG_DWARFNUM_NAME(c9, 41),