c3 55 arch/arm/include/asm/hardware/cp14.h #define RCP14_DBGDTRTXext() MRC14(0, c0, c3, 2) c3 60 arch/arm/include/asm/hardware/cp14.h #define RCP14_DBGBVR3() MRC14(0, c0, c3, 4) c3 76 arch/arm/include/asm/hardware/cp14.h #define RCP14_DBGBCR3() MRC14(0, c0, c3, 5) c3 92 arch/arm/include/asm/hardware/cp14.h #define RCP14_DBGWVR3() MRC14(0, c0, c3, 6) c3 108 arch/arm/include/asm/hardware/cp14.h #define RCP14_DBGWCR3() MRC14(0, c0, c3, 7) c3 125 arch/arm/include/asm/hardware/cp14.h #define RCP14_DBGBXVR3() MRC14(0, c1, c3, 1) c3 140 arch/arm/include/asm/hardware/cp14.h #define RCP14_DBGOSDLR() MRC14(0, c1, c3, 4) c3 160 arch/arm/include/asm/hardware/cp14.h #define WCP14_DBGDTRTXext(val) MCR14(val, 0, c0, c3, 2) c3 165 arch/arm/include/asm/hardware/cp14.h #define WCP14_DBGBVR3(val) MCR14(val, 0, c0, c3, 4) c3 181 arch/arm/include/asm/hardware/cp14.h #define WCP14_DBGBCR3(val) MCR14(val, 0, c0, c3, 5) c3 197 arch/arm/include/asm/hardware/cp14.h #define WCP14_DBGWVR3(val) MCR14(val, 0, c0, c3, 6) c3 213 arch/arm/include/asm/hardware/cp14.h #define WCP14_DBGWCR3(val) MCR14(val, 0, c0, c3, 7) c3 229 arch/arm/include/asm/hardware/cp14.h #define WCP14_DBGBXVR3(val) MCR14(val, 0, c1, c3, 1) c3 244 arch/arm/include/asm/hardware/cp14.h #define WCP14_DBGOSDLR(val) MCR14(val, 0, c1, c3, 4) c3 276 arch/arm/include/asm/hardware/cp14.h #define RCP14_ETMASICCR() MRC14(1, c0, c3, 0) c3 292 arch/arm/include/asm/hardware/cp14.h #define RCP14_ETMACVR3() MRC14(1, c0, c3, 1) c3 308 arch/arm/include/asm/hardware/cp14.h #define RCP14_ETMACTR3() MRC14(1, c0, c3, 2) c3 340 arch/arm/include/asm/hardware/cp14.h #define RCP14_ETMCNTRLDVR3() MRC14(1, c0, c3, 5) c3 356 arch/arm/include/asm/hardware/cp14.h #define RCP14_ETMSQ31EVR() MRC14(1, c0, c3, 6) c3 371 arch/arm/include/asm/hardware/cp14.h #define RCP14_ETMIMPSPEC3() MRC14(1, c0, c3, 7) c3 398 arch/arm/include/asm/hardware/cp14.h #define RCP14_ETMDEVTYPE() MRC14(1, c7, c3, 7) c3 414 arch/arm/include/asm/hardware/cp14.h #define WCP14_ETMASICCR(val) MCR14(val, 1, c0, c3, 0) c3 429 arch/arm/include/asm/hardware/cp14.h #define WCP14_ETMACVR3(val) MCR14(val, 1, c0, c3, 1) c3 445 arch/arm/include/asm/hardware/cp14.h #define WCP14_ETMACTR3(val) MCR14(val, 1, c0, c3, 2) c3 477 arch/arm/include/asm/hardware/cp14.h #define WCP14_ETMCNTRLDVR3(val) MCR14(val, 1, c0, c3, 5) c3 493 arch/arm/include/asm/hardware/cp14.h #define WCP14_ETMSQ31EVR(val) MCR14(val, 1, c0, c3, 6) c3 508 arch/arm/include/asm/hardware/cp14.h #define WCP14_ETMIMPSPEC3(val) MCR14(val, 1, c0, c3, 7) c3 49 arch/arm/include/asm/kvm_hyp.h #define DACR __ACCESS_CP15(c3, 0, c0, 0) c3 64 arch/arm/include/asm/kvm_hyp.h #define TLBIALLIS __ACCESS_CP15(c8, 0, c3, 0) c3 66 arch/arm/include/asm/kvm_hyp.h #define TLBIALLNSNHIS __ACCESS_CP15(c8, 4, c3, 4) c3 69 arch/arm/include/asm/kvm_hyp.h #define AMAIR0 __ACCESS_CP15(c10, 0, c3, 0) c3 70 arch/arm/include/asm/kvm_hyp.h #define AMAIR1 __ACCESS_CP15(c10, 0, c3, 1) c3 79 arch/arm/include/asm/kvm_hyp.h #define CNTV_CTL __ACCESS_CP15(c14, 0, c3, 1) c3 49 arch/arm/include/asm/uaccess-asm.h mcr p15, 0, \tmp, c3, c0, 0 @ Set domain register c3 63 arch/arm/include/asm/uaccess-asm.h mcr p15, 0, \tmp, c3, c0, 0 c3 90 arch/arm/include/asm/uaccess-asm.h DACR( mrc p15, 0, \tmp0, c3, c0, 0) c3 96 arch/arm/include/asm/uaccess-asm.h mcr p15, 0, \tmp2, c3, c0, 0 c3 102 arch/arm/include/asm/uaccess-asm.h mcr p15, 0, \tmp2, c3, c0, 0 c3 112 arch/arm/include/asm/uaccess-asm.h DACR( mcr p15, 0, \tmp0, c3, c0, 0) c3 956 arch/arm/kernel/hw_breakpoint.c ARM_DBG_READ(c1, c3, 4, val); c3 22 arch/arm/mm/pmsa-v8.c #define PRBAR __ACCESS_CP15(c6, 0, c3, 0) c3 23 arch/arm/mm/pmsa-v8.c #define PRLAR __ACCESS_CP15(c6, 0, c3, 1) c3 29 arch/mips/include/asm/sibyte/board.h #define setleds(t0, t1, c0, c1, c2, c3) \ c3 37 arch/mips/include/asm/sibyte/board.h li t1, c3; \ c3 40 arch/mips/include/asm/sibyte/board.h #define setleds(t0, t1, c0, c1, c2, c3) c3 102 arch/powerpc/platforms/85xx/p1022_ds.c #define MAKE_AD(alpha, red, blue, green, size, c0, c1, c2, c3) \ c3 105 arch/powerpc/platforms/85xx/p1022_ds.c (red << AD_RED_C_SHIFT) | (c3 << AD_COMP_3_SHIFT) | \ c3 146 arch/powerpc/platforms/86xx/mpc8610_hpcd.c #define MAKE_AD(alpha, red, blue, green, size, c0, c1, c2, c3) \ c3 149 arch/powerpc/platforms/86xx/mpc8610_hpcd.c (red << AD_RED_C_SHIFT) | (c3 << AD_COMP_3_SHIFT) | \ c3 155 arch/x86/events/intel/cstate.c PMU_EVENT_ATTR_STRING(c3-residency, attr_cstate_core_c3, "event=0x01"); c3 239 arch/x86/events/intel/cstate.c PMU_EVENT_ATTR_STRING(c3-residency, attr_cstate_pkg_c3, "event=0x01"); c3 43 drivers/clk/davinci/psc.h #define LPSC_CLKDEV3(n, c1, d1, c2, d2, c3, d3) \ c3 47 drivers/clk/davinci/psc.h LPSC_CLKDEV((c3), (d3)), \ c3 123 drivers/gpu/drm/amd/display/modules/color/color_gamma.c const struct fixed31_32 c3 = c3 137 drivers/gpu/drm/amd/display/modules/color/color_gamma.c (dc_fixpt_mul(c3, l_pow_m1)))); c3 152 drivers/gpu/drm/amd/display/modules/color/color_gamma.c const struct fixed31_32 c3 = c3 169 drivers/gpu/drm/amd/display/modules/color/color_gamma.c div = dc_fixpt_sub(c2, dc_fixpt_mul(c3, l_pow_m1)); c3 74 drivers/gpu/drm/nouveau/nvkm/subdev/volt/gk20a.c mv = DIV_ROUND_CLOSEST(coef->c3 * speedo, s_scale) + coef->c4 + c3 30 drivers/gpu/drm/nouveau/nvkm/subdev/volt/gk20a.h int c3; c3 497 drivers/gpu/drm/omapdrm/dss/hdmi5_core.c REG_FLD_MOD(base, HDMI_CORE_CSC_COEF_C3_MSB, csc_coeff.c3 >> 8, 6, 0); c3 498 drivers/gpu/drm/omapdrm/dss/hdmi5_core.c REG_FLD_MOD(base, HDMI_CORE_CSC_COEF_C3_LSB, csc_coeff.c3, 7, 0); c3 281 drivers/gpu/drm/omapdrm/dss/hdmi5_core.h u16 c1, c2, c3, c4; c3 110 drivers/gpu/drm/vc4/vc4_hvs.c #define VC4_LINEAR_PHASE_KERNEL(c0, c1, c2, c3, c4, c5, c6, c7, c8, \ c3 113 drivers/gpu/drm/vc4/vc4_hvs.c VC4_PPF_FILTER_WORD(c3, c4, c5), \ c3 649 drivers/hwmon/sht15.c int c2, c3; c3 655 drivers/hwmon/sht15.c c3 = -7200; /* x 10 ^ -7 */ c3 659 drivers/hwmon/sht15.c c3 = -28; /* x 10 ^ -7 */ c3 665 drivers/hwmon/sht15.c + (data->val_humid * data->val_humid * c3) / 10000; c3 1214 drivers/media/common/v4l2-tpg/v4l2-tpg-colors.c const double c3 = 32.0 * 2392.0 / 4096.0; c3 1223 drivers/media/common/v4l2-tpg/v4l2-tpg-colors.c return pow((c1 + c2 * v) / (1 + c3 * v), m2); c3 288 drivers/media/platform/sti/bdisp/bdisp-debug.c u32 c0, u32 c1, u32 c2, u32 c3) c3 293 drivers/media/platform/sti/bdisp/bdisp-debug.c seq_printf(s, "IVMX3\t0x%08X\t", c3); c3 295 drivers/media/platform/sti/bdisp/bdisp-debug.c if (!c0 && !c1 && !c2 && !c3) { c3 303 drivers/media/platform/sti/bdisp/bdisp-debug.c (c3 == bdisp_rgb_to_yuv[3])) { c3 311 drivers/media/platform/sti/bdisp/bdisp-debug.c (c3 == bdisp_yuv_to_rgb[3])) { c3 949 drivers/video/fbdev/fsl-diu-fb.c #define MAKE_PF(alpha, red, green, blue, size, c0, c1, c2, c3) \ c3 952 drivers/video/fbdev/fsl-diu-fb.c (red << PF_RED_C_SHIFT) | (c3 << PF_COMP_3_SHIFT) | \ c3 489 drivers/video/fbdev/omap2/omapfb/dss/hdmi5_core.c REG_FLD_MOD(base, HDMI_CORE_CSC_COEF_C3_MSB, csc_coeff.c3 >> 8, 6, 0); c3 490 drivers/video/fbdev/omap2/omapfb/dss/hdmi5_core.c REG_FLD_MOD(base, HDMI_CORE_CSC_COEF_C3_LSB, csc_coeff.c3, 7, 0); c3 281 drivers/video/fbdev/omap2/omapfb/dss/hdmi5_core.h u16 c1, c2, c3, c4; c3 27 include/uapi/linux/android/binder.h #define B_PACK_CHARS(c1, c2, c3, c4) \ c3 28 include/uapi/linux/android/binder.h ((((c1)<<24)) | (((c2)<<16)) | (((c3)<<8)) | (c4)) c3 65 kernel/sched/pelt.c u32 c1, c2, c3 = d3; /* y^0 == 1 */ c3 83 kernel/sched/pelt.c return c1 + c2 + c3; c3 342 security/tomoyo/util.c static inline u8 tomoyo_make_byte(const u8 c1, const u8 c2, const u8 c3) c3 344 security/tomoyo/util.c return ((c1 - '0') << 6) + ((c2 - '0') << 3) + (c3 - '0'); c3 33 tools/perf/arch/s390/include/dwarf-regs-table.h REG_DWARFNUM_NAME(c3, 35), c3 187 tools/power/x86/turbostat/turbostat.c unsigned long long c3; c3 828 tools/power/x86/turbostat/turbostat.c outp += sprintf(outp, "c3: %016llX\n", c->c3); c3 1036 tools/power/x86/turbostat/turbostat.c outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->c3/tsc); c3 1280 tools/power/x86/turbostat/turbostat.c old->c3 = new->c3 - old->c3; c3 1362 tools/power/x86/turbostat/turbostat.c if ((old->mperf + core_delta->c3 + core_delta->c6 + core_delta->c7) > (old->tsc * tsc_tweak)) c3 1366 tools/power/x86/turbostat/turbostat.c old->c1 = (old->tsc * tsc_tweak) - old->mperf - core_delta->c3 c3 1437 tools/power/x86/turbostat/turbostat.c c->c3 = 0; c3 1518 tools/power/x86/turbostat/turbostat.c average.cores.c3 += c->c3; c3 1605 tools/power/x86/turbostat/turbostat.c average.cores.c3 /= topo.num_cores; c3 1877 tools/power/x86/turbostat/turbostat.c if (get_msr(cpu, MSR_CORE_C3_RESIDENCY, &c->c3))