c11 18 arch/arm/include/asm/arch_gicv3.h #define ICC_DIR __ACCESS_CP15(c12, 0, c11, 1) c11 26 arch/arm/include/asm/arch_gicv3.h #define ICC_RPR __ACCESS_CP15(c12, 0, c11, 3) c11 43 arch/arm/include/asm/arch_gicv3.h #define ICH_HCR __ACCESS_CP15(c12, 4, c11, 0) c11 44 arch/arm/include/asm/arch_gicv3.h #define ICH_VTR __ACCESS_CP15(c12, 4, c11, 1) c11 45 arch/arm/include/asm/arch_gicv3.h #define ICH_MISR __ACCESS_CP15(c12, 4, c11, 2) c11 46 arch/arm/include/asm/arch_gicv3.h #define ICH_EISR __ACCESS_CP15(c12, 4, c11, 3) c11 47 arch/arm/include/asm/arch_gicv3.h #define ICH_ELRSR __ACCESS_CP15(c12, 4, c11, 5) c11 48 arch/arm/include/asm/arch_gicv3.h #define ICH_VMCR __ACCESS_CP15(c12, 4, c11, 7) c11 52 arch/arm/include/asm/hardware/cp14.h #define RCP14_DBGDSMCR() MRC14(0, c0, c11, 0) c11 68 arch/arm/include/asm/hardware/cp14.h #define RCP14_DBGBVR11() MRC14(0, c0, c11, 4) c11 84 arch/arm/include/asm/hardware/cp14.h #define RCP14_DBGBCR11() MRC14(0, c0, c11, 5) c11 100 arch/arm/include/asm/hardware/cp14.h #define RCP14_DBGWVR11() MRC14(0, c0, c11, 6) c11 116 arch/arm/include/asm/hardware/cp14.h #define RCP14_DBGWCR11() MRC14(0, c0, c11, 7) c11 133 arch/arm/include/asm/hardware/cp14.h #define RCP14_DBGBXVR11() MRC14(0, c1, c11, 1) c11 157 arch/arm/include/asm/hardware/cp14.h #define WCP14_DBGDSMCR(val) MCR14(val, 0, c0, c11, 0) c11 173 arch/arm/include/asm/hardware/cp14.h #define WCP14_DBGBVR11(val) MCR14(val, 0, c0, c11, 4) c11 189 arch/arm/include/asm/hardware/cp14.h #define WCP14_DBGBCR11(val) MCR14(val, 0, c0, c11, 5) c11 205 arch/arm/include/asm/hardware/cp14.h #define WCP14_DBGWVR11(val) MCR14(val, 0, c0, c11, 6) c11 221 arch/arm/include/asm/hardware/cp14.h #define WCP14_DBGWCR11(val) MCR14(val, 0, c0, c11, 7) c11 237 arch/arm/include/asm/hardware/cp14.h #define WCP14_DBGBXVR11(val) MCR14(val, 0, c1, c11, 1) c11 284 arch/arm/include/asm/hardware/cp14.h #define RCP14_ETMFFLR() MRC14(1, c0, c11, 0) c11 300 arch/arm/include/asm/hardware/cp14.h #define RCP14_ETMACVR11() MRC14(1, c0, c11, 1) c11 316 arch/arm/include/asm/hardware/cp14.h #define RCP14_ETMACTR11() MRC14(1, c0, c11, 2) c11 348 arch/arm/include/asm/hardware/cp14.h #define RCP14_ETMCNTRLDEVR3() MRC14(1, c0, c11, 5) c11 363 arch/arm/include/asm/hardware/cp14.h #define RCP14_ETMEXTOUTEVR3() MRC14(1, c0, c11, 6) c11 379 arch/arm/include/asm/hardware/cp14.h #define RCP14_ETMEXTINSELR() MRC14(1, c0, c11, 7) c11 406 arch/arm/include/asm/hardware/cp14.h #define RCP14_ETMPIDR3() MRC14(1, c7, c11, 7) c11 421 arch/arm/include/asm/hardware/cp14.h #define WCP14_ETMFFLR(val) MCR14(val, 1, c0, c11, 0) c11 437 arch/arm/include/asm/hardware/cp14.h #define WCP14_ETMACVR11(val) MCR14(val, 1, c0, c11, 1) c11 453 arch/arm/include/asm/hardware/cp14.h #define WCP14_ETMACTR11(val) MCR14(val, 1, c0, c11, 2) c11 485 arch/arm/include/asm/hardware/cp14.h #define WCP14_ETMCNTRLDEVR3(val) MCR14(val, 1, c0, c11, 5) c11 500 arch/arm/include/asm/hardware/cp14.h #define WCP14_ETMEXTOUTEVR3(val) MCR14(val, 1, c0, c11, 6) c11 515 arch/arm/include/asm/hardware/cp14.h #define WCP14_ETMEXTINSELR(val) MCR14(val, 1, c0, c11, 7) c11 111 drivers/gpu/drm/vc4/vc4_hvs.c c9, c10, c11, c12, c13, c14, c15) \ c11 115 drivers/gpu/drm/vc4/vc4_hvs.c VC4_PPF_FILTER_WORD(c9, c10, c11), \ c11 89 drivers/iio/pressure/dps310.c s32 c00, c10, c20, c30, c01, c11, c21; c11 115 drivers/iio/pressure/dps310.c u32 c00, c10, c20, c30, c01, c11, c21; c11 147 drivers/iio/pressure/dps310.c c11 = (coef[10] << 8) | coef[11]; c11 148 drivers/iio/pressure/dps310.c data->c11 = sign_extend32(c11, 15); c11 514 drivers/iio/pressure/dps310.c nums[5] = t * p * (s64)data->c11; c11 1582 drivers/staging/media/ipu3/include/intel-ipu3.h __u32 c11:9; c11 1832 drivers/staging/media/ipu3/include/intel-ipu3.h __u32 c11:2; c11 41 tools/perf/arch/s390/include/dwarf-regs-table.h REG_DWARFNUM_NAME(c11, 43),