bytediv_init      414 drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm_8960.c 	struct clk_init_data bytediv_init = { };
bytediv_init      445 drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm_8960.c 	bytediv->hw.init = &bytediv_init;
bytediv_init      451 drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm_8960.c 	bytediv_init.name = clk_name;
bytediv_init      452 drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm_8960.c 	bytediv_init.ops = &clk_bytediv_ops;
bytediv_init      453 drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm_8960.c 	bytediv_init.flags = CLK_SET_RATE_PARENT;
bytediv_init      454 drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm_8960.c 	bytediv_init.parent_names = (const char * const *) &parent_name;
bytediv_init      455 drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm_8960.c 	bytediv_init.num_parents = 1;