byte_enables      216 arch/arm/mach-ixp4xx/common-pci.c 	u32 n, byte_enables, data;
byte_enables      219 arch/arm/mach-ixp4xx/common-pci.c 	byte_enables = local_byte_lane_enable_bits(n, size);
byte_enables      220 arch/arm/mach-ixp4xx/common-pci.c 	if (byte_enables == 0xffffffff)
byte_enables      223 arch/arm/mach-ixp4xx/common-pci.c 	crp_write((where & ~3) | byte_enables, data);
byte_enables      240 arch/arm/mach-ixp4xx/common-pci.c 	u32 n, byte_enables, addr, data;
byte_enables      248 arch/arm/mach-ixp4xx/common-pci.c 	byte_enables = byte_lane_enable_bits(n, size);
byte_enables      249 arch/arm/mach-ixp4xx/common-pci.c 	if (byte_enables == 0xffffffff)
byte_enables      253 arch/arm/mach-ixp4xx/common-pci.c 	if (ixp4xx_pci_read(addr, byte_enables | NP_CMD_CONFIGREAD, &data))
byte_enables      263 arch/arm/mach-ixp4xx/common-pci.c 	u32 n, byte_enables, addr, data;
byte_enables      270 arch/arm/mach-ixp4xx/common-pci.c 	byte_enables = byte_lane_enable_bits(n, size);
byte_enables      271 arch/arm/mach-ixp4xx/common-pci.c 	if (byte_enables == 0xffffffff)
byte_enables      276 arch/arm/mach-ixp4xx/common-pci.c 	if (ixp4xx_pci_write(addr, byte_enables | NP_CMD_CONFIGWRITE, data))
byte_enables       81 arch/arm/mach-ixp4xx/include/mach/io.h 	u32 n, byte_enables, data;
byte_enables       89 arch/arm/mach-ixp4xx/include/mach/io.h 	byte_enables = (0xf & ~BIT(n)) << IXP4XX_PCI_NP_CBE_BESL;
byte_enables       91 arch/arm/mach-ixp4xx/include/mach/io.h 	ixp4xx_pci_write(addr, byte_enables | NP_CMD_MEMWRITE, data);
byte_enables      106 arch/arm/mach-ixp4xx/include/mach/io.h 	u32 n, byte_enables, data;
byte_enables      114 arch/arm/mach-ixp4xx/include/mach/io.h 	byte_enables = (0xf & ~(BIT(n) | BIT(n+1))) << IXP4XX_PCI_NP_CBE_BESL;
byte_enables      116 arch/arm/mach-ixp4xx/include/mach/io.h 	ixp4xx_pci_write(addr, byte_enables | NP_CMD_MEMWRITE, data);
byte_enables      151 arch/arm/mach-ixp4xx/include/mach/io.h 	u32 n, byte_enables, data;
byte_enables      157 arch/arm/mach-ixp4xx/include/mach/io.h 	byte_enables = (0xf & ~BIT(n)) << IXP4XX_PCI_NP_CBE_BESL;
byte_enables      158 arch/arm/mach-ixp4xx/include/mach/io.h 	if (ixp4xx_pci_read(addr, byte_enables | NP_CMD_MEMREAD, &data))
byte_enables      176 arch/arm/mach-ixp4xx/include/mach/io.h 	u32 n, byte_enables, data;
byte_enables      182 arch/arm/mach-ixp4xx/include/mach/io.h 	byte_enables = (0xf & ~(BIT(n) | BIT(n+1))) << IXP4XX_PCI_NP_CBE_BESL;
byte_enables      183 arch/arm/mach-ixp4xx/include/mach/io.h 	if (ixp4xx_pci_read(addr, byte_enables | NP_CMD_MEMREAD, &data))
byte_enables      248 arch/arm/mach-ixp4xx/include/mach/io.h 	u32 n, byte_enables, data;
byte_enables      250 arch/arm/mach-ixp4xx/include/mach/io.h 	byte_enables = (0xf & ~BIT(n)) << IXP4XX_PCI_NP_CBE_BESL;
byte_enables      252 arch/arm/mach-ixp4xx/include/mach/io.h 	ixp4xx_pci_write(addr, byte_enables | NP_CMD_IOWRITE, data);
byte_enables      267 arch/arm/mach-ixp4xx/include/mach/io.h 	u32 n, byte_enables, data;
byte_enables      269 arch/arm/mach-ixp4xx/include/mach/io.h 	byte_enables = (0xf & ~(BIT(n) | BIT(n+1))) << IXP4XX_PCI_NP_CBE_BESL;
byte_enables      271 arch/arm/mach-ixp4xx/include/mach/io.h 	ixp4xx_pci_write(addr, byte_enables | NP_CMD_IOWRITE, data);
byte_enables      299 arch/arm/mach-ixp4xx/include/mach/io.h 	u32 n, byte_enables, data;
byte_enables      301 arch/arm/mach-ixp4xx/include/mach/io.h 	byte_enables = (0xf & ~BIT(n)) << IXP4XX_PCI_NP_CBE_BESL;
byte_enables      302 arch/arm/mach-ixp4xx/include/mach/io.h 	if (ixp4xx_pci_read(addr, byte_enables | NP_CMD_IOREAD, &data))
byte_enables      319 arch/arm/mach-ixp4xx/include/mach/io.h 	u32 n, byte_enables, data;
byte_enables      321 arch/arm/mach-ixp4xx/include/mach/io.h 	byte_enables = (0xf & ~(BIT(n) | BIT(n+1))) << IXP4XX_PCI_NP_CBE_BESL;
byte_enables      322 arch/arm/mach-ixp4xx/include/mach/io.h 	if (ixp4xx_pci_read(addr, byte_enables | NP_CMD_IOREAD, &data))