bypass 113 arch/arm/mach-omap2/clkt2xxx_dpllcore.c u32 bypass = 0; bypass 161 arch/arm/mach-omap2/clkt2xxx_dpllcore.c bypass = 1; bypass 168 arch/arm/mach-omap2/clkt2xxx_dpllcore.c bypass); bypass 98 arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c u32 cur_rate, done_rate, bypass = 0; bypass 133 arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c bypass = 1; bypass 151 arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c bypass); bypass 159 arch/arm/mach-omap2/sram.c static u32 (*_omap2_set_prcm)(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass); bypass 161 arch/arm/mach-omap2/sram.c u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass) bypass 164 arch/arm/mach-omap2/sram.c return _omap2_set_prcm(dpll_ctrl_val, sdrc_rfr_val, bypass); bypass 13 arch/arm/mach-omap2/sram.h extern u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass); bypass 26 arch/arm/mach-omap2/sram.h int bypass); bypass 39 arch/arm/mach-omap2/sram.h int bypass); bypass 268 arch/c6x/platforms/pll.c u8 bypass; bypass 279 arch/c6x/platforms/pll.c bypass = 0; bypass 281 arch/c6x/platforms/pll.c bypass = 1; bypass 302 arch/c6x/platforms/pll.c if (!bypass) { bypass 66 arch/mips/cavium-octeon/executive/cvmx-helper-jtag.c jtgc.s.bypass = 0x3; bypass 68 arch/mips/cavium-octeon/executive/cvmx-helper-jtag.c jtgc.s.bypass = 0xf; bypass 200 arch/mips/include/asm/octeon/cvmx-asxx-defs.h uint64_t bypass:1; bypass 202 arch/mips/include/asm/octeon/cvmx-asxx-defs.h uint64_t bypass:1; bypass 469 arch/mips/include/asm/octeon/cvmx-asxx-defs.h uint64_t bypass:1; bypass 475 arch/mips/include/asm/octeon/cvmx-asxx-defs.h uint64_t bypass:1; bypass 493 arch/mips/include/asm/octeon/cvmx-asxx-defs.h uint64_t bypass:1; bypass 503 arch/mips/include/asm/octeon/cvmx-asxx-defs.h uint64_t bypass:1; bypass 121 arch/mips/include/asm/octeon/cvmx-ciu-defs.h __BITFIELD_FIELD(uint64_t bypass:4, bypass 2120 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h uint64_t bypass:1; bypass 2146 arch/mips/include/asm/octeon/cvmx-lmcx-defs.h uint64_t bypass:1; bypass 443 arch/powerpc/boot/4xx.c goto bypass; bypass 450 arch/powerpc/boot/4xx.c bypass: bypass 771 arch/powerpc/boot/4xx.c goto bypass; bypass 776 arch/powerpc/boot/4xx.c bypass: bypass 213 arch/powerpc/platforms/powernv/pci.h extern void pnv_npu_try_dma_set_bypass(struct pci_dev *gpdev, bool bypass); bypass 344 drivers/base/regmap/regcache.c bool bypass; bypass 350 drivers/base/regmap/regcache.c bypass = map->cache_bypass; bypass 384 drivers/base/regmap/regcache.c map->cache_bypass = bypass; bypass 413 drivers/base/regmap/regcache.c bool bypass; bypass 420 drivers/base/regmap/regcache.c bypass = map->cache_bypass; bypass 439 drivers/base/regmap/regcache.c map->cache_bypass = bypass; bypass 2400 drivers/base/regmap/regmap.c bool bypass; bypass 2404 drivers/base/regmap/regmap.c bypass = map->cache_bypass; bypass 2409 drivers/base/regmap/regmap.c map->cache_bypass = bypass; bypass 3026 drivers/base/regmap/regmap.c bool bypass; bypass 3045 drivers/base/regmap/regmap.c bypass = map->cache_bypass; bypass 3053 drivers/base/regmap/regmap.c map->cache_bypass = bypass; bypass 338 drivers/clk/at91/at91sam9260.c bool bypass; bypass 361 drivers/clk/at91/at91sam9260.c bypass = of_property_read_bool(np, "atmel,osc-bypass"); bypass 364 drivers/clk/at91/at91sam9260.c bypass); bypass 136 drivers/clk/at91/at91sam9x5.c bool bypass; bypass 163 drivers/clk/at91/at91sam9x5.c bypass = of_property_read_bool(np, "atmel,osc-bypass"); bypass 166 drivers/clk/at91/at91sam9x5.c bypass); bypass 133 drivers/clk/at91/clk-main.c bool bypass) bypass 156 drivers/clk/at91/clk-main.c if (bypass) bypass 240 drivers/clk/at91/dt-compat.c bool bypass; bypass 243 drivers/clk/at91/dt-compat.c bypass = of_property_read_bool(np, "atmel,osc-bypass"); bypass 250 drivers/clk/at91/dt-compat.c hw = at91_clk_register_main_osc(regmap, name, parent_name, bypass); bypass 138 drivers/clk/at91/pmc.h const char *parent_name, bool bypass); bypass 165 drivers/clk/at91/sam9x60.c bool bypass; bypass 200 drivers/clk/at91/sam9x60.c bypass = of_property_read_bool(np, "atmel,osc-bypass"); bypass 203 drivers/clk/at91/sam9x60.c bypass); bypass 152 drivers/clk/at91/sama5d2.c bool bypass; bypass 181 drivers/clk/at91/sama5d2.c bypass = of_property_read_bool(np, "atmel,osc-bypass"); bypass 184 drivers/clk/at91/sama5d2.c bypass); bypass 126 drivers/clk/at91/sama5d4.c bool bypass; bypass 154 drivers/clk/at91/sama5d4.c bypass = of_property_read_bool(np, "atmel,osc-bypass"); bypass 157 drivers/clk/at91/sama5d4.c bypass); bypass 122 drivers/clk/at91/sckc.c bool bypass, bypass 148 drivers/clk/at91/sckc.c if (bypass) bypass 374 drivers/clk/at91/sckc.c bool bypass; bypass 394 drivers/clk/at91/sckc.c bypass = of_property_read_bool(child, "atmel,osc-bypass"); bypass 398 drivers/clk/at91/sckc.c bypass = of_property_read_bool(np, "atmel,osc-bypass"); bypass 405 drivers/clk/at91/sckc.c xtal_name, 1200000, bypass, bits); bypass 468 drivers/clk/at91/sckc.c bool bypass; bypass 483 drivers/clk/at91/sckc.c bypass = of_property_read_bool(np, "atmel,osc-bypass"); bypass 485 drivers/clk/at91/sckc.c xtal_name, 5000000, bypass, bypass 74 drivers/clk/imx/clk-sccg-pll.c int bypass; bypass 149 drivers/clk/imx/clk-sccg-pll.c temp_setup->bypass = PLL_BYPASS1; bypass 224 drivers/clk/imx/clk-sccg-pll.c temp_setup->bypass = PLL_BYPASS_NONE; bypass 286 drivers/clk/imx/clk-sccg-pll.c setup->bypass = PLL_BYPASS2; bypass 377 drivers/clk/imx/clk-sccg-pll.c val |= FIELD_PREP(SSCG_PLL_BYPASS_MASK, setup->bypass); bypass 414 drivers/clk/imx/clk-sccg-pll.c val |= FIELD_PREP(SSCG_PLL_BYPASS_MASK, pll->setup.bypass); bypass 425 drivers/clk/imx/clk-sccg-pll.c int bypass) bypass 436 drivers/clk/imx/clk-sccg-pll.c switch (bypass) { bypass 452 drivers/clk/imx/clk-sccg-pll.c rate, bypass); bypass 78 drivers/clk/ingenic/cgu.c bool bypass; bypass 96 drivers/clk/ingenic/cgu.c bypass = !pll_info->no_bypass_bit && bypass 99 drivers/clk/ingenic/cgu.c if (bypass) bypass 44 drivers/clk/socfpga/clk-pll.c unsigned long bypass; bypass 47 drivers/clk/socfpga/clk-pll.c bypass = readl(clk_mgr_base_addr + CLKMGR_BYPASS); bypass 48 drivers/clk/socfpga/clk-pll.c if (bypass & MAINPLL_BYPASS) bypass 264 drivers/crypto/amcc/crypto4xx_reg_def.h u32 bypass:8; bypass 533 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c bool bypass) bypass 542 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c if (bypass) { bypass 555 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c bool bypass) bypass 570 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c if (bypass) { bypass 52 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_clk.c void rv1_dump_clk_registers(struct clk_state_registers *regs, struct clk_bypass *bypass, struct clk_mgr *clk_mgr_base) bypass 58 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_clk.c bypass->dcfclk_bypass = REG_READ(CLK0_CLK8_BYPASS_CNTL) & 0x0007; bypass 59 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_clk.c if (bypass->dcfclk_bypass < 0 || bypass->dcfclk_bypass > 4) bypass 60 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_clk.c bypass->dcfclk_bypass = 0; bypass 69 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_clk.c bypass->dispclk_pypass = REG_READ(CLK0_CLK10_BYPASS_CNTL) & 0x0007; bypass 70 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_clk.c if (bypass->dispclk_pypass < 0 || bypass->dispclk_pypass > 4) bypass 71 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_clk.c bypass->dispclk_pypass = 0; bypass 75 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_clk.c bypass->dprefclk_bypass = REG_READ(CLK0_CLK11_BYPASS_CNTL) & 0x0007; bypass 76 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_clk.c if (bypass->dprefclk_bypass < 0 || bypass->dprefclk_bypass > 4) bypass 77 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_clk.c bypass->dprefclk_bypass = 0; bypass 78 drivers/gpu/drm/exynos/exynos_drm_fimc.c bool bypass; bypass 812 drivers/gpu/drm/exynos/exynos_drm_fimc.c sc->range, sc->bypass, sc->up_h, sc->up_v); bypass 827 drivers/gpu/drm/exynos/exynos_drm_fimc.c if (sc->bypass) bypass 869 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = cdclk_state->bypass = cdclk_state->ref; bypass 1022 drivers/gpu/drm/i915/display/intel_cdclk.c WARN_ON(cdclk != dev_priv->cdclk.hw.bypass); bypass 1099 drivers/gpu/drm/i915/display/intel_cdclk.c dev_priv->cdclk.hw.cdclk == dev_priv->cdclk.hw.bypass) bypass 1157 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state.cdclk = cdclk_state.bypass; bypass 1197 drivers/gpu/drm/i915/display/intel_cdclk.c if (cdclk == dev_priv->cdclk.hw.bypass) bypass 1222 drivers/gpu/drm/i915/display/intel_cdclk.c if (cdclk == dev_priv->cdclk.hw.bypass) bypass 1266 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = cdclk_state->bypass = cdclk_state->ref; bypass 1347 drivers/gpu/drm/i915/display/intel_cdclk.c WARN_ON(cdclk != dev_priv->cdclk.hw.bypass); bypass 1428 drivers/gpu/drm/i915/display/intel_cdclk.c dev_priv->cdclk.hw.cdclk == dev_priv->cdclk.hw.bypass) bypass 1501 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state.cdclk = cdclk_state.bypass; bypass 1558 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = cdclk_state->bypass = cdclk_state->ref; bypass 1643 drivers/gpu/drm/i915/display/intel_cdclk.c WARN_ON(cdclk != dev_priv->cdclk.hw.bypass); bypass 1688 drivers/gpu/drm/i915/display/intel_cdclk.c if (cdclk == dev_priv->cdclk.hw.bypass) bypass 1715 drivers/gpu/drm/i915/display/intel_cdclk.c dev_priv->cdclk.hw.cdclk == dev_priv->cdclk.hw.bypass) bypass 1784 drivers/gpu/drm/i915/display/intel_cdclk.c if (cdclk == dev_priv->cdclk.hw.bypass) bypass 1885 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->bypass = 50000; bypass 1911 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->cdclk = cdclk_state->bypass; bypass 1941 drivers/gpu/drm/i915/display/intel_cdclk.c if (dev_priv->cdclk.hw.cdclk == dev_priv->cdclk.hw.bypass) bypass 1973 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state.cdclk = cdclk_state.bypass; bypass 2004 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state.cdclk = cdclk_state.bypass; bypass 2129 drivers/gpu/drm/i915/display/intel_cdclk.c cdclk_state->ref, cdclk_state->bypass, bypass 1278 drivers/gpu/drm/i915/i915_drv.h unsigned int cdclk, vco, ref, bypass; bypass 371 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c u32 bypass; bypass 375 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c bypass = nvkm_rd32(device, ctrl) & 0x00000008; bypass 376 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c if (!bypass) { bypass 413 drivers/gpu/drm/sun4i/sun4i_frontend.c u32 bypass; bypass 466 drivers/gpu/drm/sun4i/sun4i_frontend.c bypass = 0; bypass 473 drivers/gpu/drm/sun4i/sun4i_frontend.c bypass = SUN4I_FRONTEND_BYPASS_CSC_EN; bypass 477 drivers/gpu/drm/sun4i/sun4i_frontend.c SUN4I_FRONTEND_BYPASS_CSC_EN, bypass); bypass 402 drivers/infiniband/hw/cxgb3/cxio_wr.h struct t3_bypass_wr bypass; bypass 226 drivers/infiniband/hw/hfi1/trace.c const char *hfi1_trace_fmt_lrh(struct trace_seq *p, bool bypass, bypass 236 drivers/infiniband/hw/hfi1/trace.c if (bypass) bypass 256 drivers/infiniband/hw/hfi1/trace.c const char *hfi1_trace_fmt_rest(struct trace_seq *p, bool bypass, u8 l4, bypass 264 drivers/infiniband/hw/hfi1/trace.c if (bypass) bypass 132 drivers/infiniband/hw/hfi1/trace_ibhdrs.h const char *hfi1_trace_fmt_lrh(struct trace_seq *p, bool bypass, bypass 138 drivers/infiniband/hw/hfi1/trace_ibhdrs.h const char *hfi1_trace_fmt_rest(struct trace_seq *p, bool bypass, u8 l4, bypass 268 drivers/infiniband/hw/hfi1/ud.c u16 *pkey, u32 extra_bytes, bool bypass) bypass 288 drivers/infiniband/hw/hfi1/ud.c if (!bypass) bypass 3169 drivers/iommu/arm-smmu-v3.c static int arm_smmu_device_reset(struct arm_smmu_device *smmu, bool bypass) bypass 3287 drivers/iommu/arm-smmu-v3.c if (!bypass || disable_bypass) { bypass 3582 drivers/iommu/arm-smmu-v3.c bool bypass; bypass 3600 drivers/iommu/arm-smmu-v3.c bypass = !!ret; bypass 3646 drivers/iommu/arm-smmu-v3.c ret = arm_smmu_device_reset(smmu, bypass); bypass 470 drivers/irqchip/irq-gic.c u32 bypass = 0; bypass 484 drivers/irqchip/irq-gic.c bypass = readl(cpu_base + GIC_CPU_CTRL); bypass 485 drivers/irqchip/irq-gic.c bypass &= GICC_DIS_BYPASS_MASK; bypass 487 drivers/irqchip/irq-gic.c writel_relaxed(bypass | mode | GICC_ENABLE, cpu_base + GIC_CPU_CTRL); bypass 204 drivers/md/bcache/request.c if (op->bypass) bypass 283 drivers/md/bcache/request.c op->bypass = true; bypass 325 drivers/md/bcache/request.c op->writeback, op->bypass); bypass 877 drivers/md/bcache/request.c !s->cache_missed, s->iop.bypass); bypass 878 drivers/md/bcache/request.c trace_bcache_read(s->orig_bio, !s->cache_missed, s->iop.bypass); bypass 898 drivers/md/bcache/request.c if (s->cache_miss || s->iop.bypass) { bypass 998 drivers/md/bcache/request.c s->iop.bypass = false; bypass 1010 drivers/md/bcache/request.c s->iop.bypass = true; bypass 1014 drivers/md/bcache/request.c s->iop.bypass)) { bypass 1015 drivers/md/bcache/request.c s->iop.bypass = false; bypass 1019 drivers/md/bcache/request.c if (s->iop.bypass) { bypass 1227 drivers/md/bcache/request.c s->iop.bypass = check_should_bypass(dc, bio); bypass 1351 drivers/md/bcache/request.c s->iop.bypass = (bio_op(bio) == REQ_OP_DISCARD) != 0; bypass 20 drivers/md/bcache/request.h unsigned int bypass:1; bypass 189 drivers/md/bcache/stats.c bool hit, bool bypass) bypass 191 drivers/md/bcache/stats.c if (!bypass) bypass 204 drivers/md/bcache/stats.c bool hit, bool bypass) bypass 208 drivers/md/bcache/stats.c mark_cache_stats(&dc->accounting.collector, hit, bypass); bypass 209 drivers/md/bcache/stats.c mark_cache_stats(&c->accounting.collector, hit, bypass); bypass 57 drivers/md/bcache/stats.h bool hit, bool bypass); bypass 464 drivers/media/platform/exynos4-is/fimc-is-param.c drc->control.bypass = val; bypass 686 drivers/media/platform/exynos4-is/fimc-is-param.c isp->control.bypass = CONTROL_BYPASS_DISABLE; bypass 858 drivers/media/platform/exynos4-is/fimc-is-param.c fd->control.bypass = CONTROL_BYPASS_DISABLE; bypass 451 drivers/media/platform/exynos4-is/fimc-is-param.h u32 bypass; bypass 152 drivers/media/usb/dvb-usb/vp702x.c static int vp702x_set_pld_mode(struct dvb_usb_adapter *adap, u8 bypass) bypass 163 drivers/media/usb/dvb-usb/vp702x.c ret = vp702x_usb_in_op(adap->dev, 0xe0, (bypass << 8) | 0x0e, bypass 1369 drivers/mfd/arizona-core.c !arizona->pdata.micbias[i].bypass) bypass 1389 drivers/mfd/arizona-core.c if (arizona->pdata.micbias[i].bypass) bypass 272 drivers/misc/xilinx_sdfec.c &xsdfec->config.bypass); bypass 758 drivers/misc/xilinx_sdfec.c bool bypass; bypass 761 drivers/misc/xilinx_sdfec.c err = get_user(bypass, arg); bypass 769 drivers/misc/xilinx_sdfec.c if (bypass) bypass 774 drivers/misc/xilinx_sdfec.c xsdfec->config.bypass = bypass; bypass 825 drivers/mtd/spi-nor/cadence-quadspi.c const bool bypass, bypass 833 drivers/mtd/spi-nor/cadence-quadspi.c if (bypass) bypass 56 drivers/net/dsa/sja1105/sja1105_clocking.c u64 bypass; bypass 312 drivers/net/dsa/sja1105/sja1105_clocking.c sja1105_packing(buf, &cmd->bypass, 1, 1, size, op); bypass 594 drivers/net/dsa/sja1105/sja1105_clocking.c pll.bypass = 0x0; bypass 396 drivers/net/ethernet/chelsio/cxgb4/cxgb4.h unsigned char bypass; bypass 1446 drivers/net/ethernet/chelsio/cxgb4/cxgb4.h return adap->params.bypass; bypass 4495 drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c adap->params.bypass = 1; bypass 525 drivers/perf/xgene_pmu.c XGENE_PMU_EVENT_ATTR(mcu-req-from-bypass, 0x22), bypass 36 drivers/pwm/pwm-lpss-pci.c .bypass = true, bypass 38 drivers/pwm/pwm-lpss-platform.c .bypass = true, bypass 139 drivers/pwm/pwm-lpss.c pwm_lpss_cond_enable(pwm, lpwm->info->bypass == false); bypass 145 drivers/pwm/pwm-lpss.c pwm_lpss_cond_enable(pwm, lpwm->info->bypass == true); bypass 29 drivers/pwm/pwm-lpss.h bool bypass; bypass 30 drivers/regulator/anatop-regulator.c bool bypass; bypass 65 drivers/regulator/anatop-regulator.c sel = anatop_reg->bypass ? LDO_FET_FULL_ON : anatop_reg->sel; bypass 85 drivers/regulator/anatop-regulator.c if (anatop_reg->bypass || !anatop_regmap_is_enabled(reg)) { bypass 100 drivers/regulator/anatop-regulator.c if (anatop_reg->bypass || !anatop_regmap_is_enabled(reg)) bypass 113 drivers/regulator/anatop-regulator.c WARN_ON(!anatop_reg->bypass); bypass 115 drivers/regulator/anatop-regulator.c WARN_ON(anatop_reg->bypass); bypass 117 drivers/regulator/anatop-regulator.c *enable = anatop_reg->bypass; bypass 126 drivers/regulator/anatop-regulator.c if (enable == anatop_reg->bypass) bypass 130 drivers/regulator/anatop-regulator.c anatop_reg->bypass = enable; bypass 270 drivers/regulator/anatop-regulator.c sreg->bypass = true; bypass 285 drivers/regulator/anatop-regulator.c if (!sreg->bypass && !sreg->sel) { bypass 890 drivers/regulator/core.c bool bypass; bypass 893 drivers/regulator/core.c ret = rdev->desc->ops->get_bypass(rdev, &bypass); bypass 897 drivers/regulator/core.c else if (bypass) bypass 904 drivers/regulator/core.c static DEVICE_ATTR(bypass, 0444, bypass 4320 drivers/regulator/core.c if (enable && !regulator->bypass) { bypass 4329 drivers/regulator/core.c } else if (!enable && regulator->bypass) { bypass 4340 drivers/regulator/core.c regulator->bypass = enable; bypass 38 drivers/regulator/internal.h unsigned int bypass:1; bypass 1234 fs/erofs/zdata.c unsigned int i = 0, bypass = 0; bypass 1258 fs/erofs/zdata.c ++bypass; bypass 1291 fs/erofs/zdata.c if (bypass < clusterpages) bypass 63 include/linux/mfd/arizona/pdata.h unsigned int bypass:1; /** Use bypass mode */ bypass 41 include/sound/wm2200.h unsigned int bypass:1; /** Use bypass mode */ bypass 124 include/trace/events/bcache.h TP_PROTO(struct bio *bio, bool hit, bool bypass), bypass 125 include/trace/events/bcache.h TP_ARGS(bio, hit, bypass), bypass 133 include/trace/events/bcache.h __field(bool, bypass ) bypass 142 include/trace/events/bcache.h __entry->bypass = bypass; bypass 148 include/trace/events/bcache.h __entry->nr_sector, __entry->cache_hit, __entry->bypass) bypass 153 include/trace/events/bcache.h bool writeback, bool bypass), bypass 154 include/trace/events/bcache.h TP_ARGS(c, inode, bio, writeback, bypass), bypass 163 include/trace/events/bcache.h __field(bool, bypass ) bypass 173 include/trace/events/bcache.h __entry->bypass = bypass; bypass 179 include/trace/events/bcache.h __entry->nr_sector, __entry->writeback, __entry->bypass) bypass 27 include/uapi/linux/netfilter/xt_NFQUEUE.h __u16 bypass; bypass 232 include/uapi/misc/xilinx_sdfec.h __s8 bypass; bypass 1945 kernel/rcu/tree_plugin.h bool bypass = false; bypass 1981 kernel/rcu/tree_plugin.h bypass = true; bypass 1984 kernel/rcu/tree_plugin.h if (bypass) { // Avoid race with first bypass CB. bypass 2026 kernel/rcu/tree_plugin.h my_rdp->nocb_gp_bypass = bypass; bypass 2029 kernel/rcu/tree_plugin.h if (bypass && !rcu_nocb_poll) { bypass 2058 kernel/rcu/tree_plugin.h if (bypass) bypass 55 net/netfilter/xt_NFQUEUE.c if (info->bypass) bypass 57 net/sched/sch_fifo.c bool bypass; bypass 77 net/sched/sch_fifo.c bypass = sch->limit >= psched_mtu(qdisc_dev(sch)); bypass 79 net/sched/sch_fifo.c bypass = sch->limit >= 1; bypass 81 net/sched/sch_fifo.c if (bypass) bypass 145 sound/soc/codecs/rl6231.c bool bypass = false; bypass 156 sound/soc/codecs/rl6231.c bypass = pll_preset_table[i].m_bp; bypass 179 sound/soc/codecs/rl6231.c bypass = true; bypass 187 sound/soc/codecs/rl6231.c bypass = true; bypass 199 sound/soc/codecs/rl6231.c bypass = false; bypass 214 sound/soc/codecs/rl6231.c pll_code->m_bp = bypass; bypass 2347 sound/soc/codecs/wm2200.c !wm2200->pdata.micbias[i].bypass) bypass 2364 sound/soc/codecs/wm2200.c if (wm2200->pdata.micbias[i].bypass) bypass 788 sound/soc/intel/atom/sst-atom-controls.h bool bypass;