bw_state          285 drivers/gpu/drm/i915/display/intel_bw.c void intel_bw_crtc_update(struct intel_bw_state *bw_state,
bw_state          290 drivers/gpu/drm/i915/display/intel_bw.c 	bw_state->data_rate[crtc->pipe] =
bw_state          292 drivers/gpu/drm/i915/display/intel_bw.c 	bw_state->num_active_planes[crtc->pipe] =
bw_state          297 drivers/gpu/drm/i915/display/intel_bw.c 		      bw_state->data_rate[crtc->pipe],
bw_state          298 drivers/gpu/drm/i915/display/intel_bw.c 		      bw_state->num_active_planes[crtc->pipe]);
bw_state          302 drivers/gpu/drm/i915/display/intel_bw.c 					       const struct intel_bw_state *bw_state)
bw_state          308 drivers/gpu/drm/i915/display/intel_bw.c 		num_active_planes += bw_state->num_active_planes[pipe];
bw_state          314 drivers/gpu/drm/i915/display/intel_bw.c 				       const struct intel_bw_state *bw_state)
bw_state          320 drivers/gpu/drm/i915/display/intel_bw.c 		data_rate += bw_state->data_rate[pipe];
bw_state          329 drivers/gpu/drm/i915/display/intel_bw.c 	struct drm_private_state *bw_state;
bw_state          331 drivers/gpu/drm/i915/display/intel_bw.c 	bw_state = drm_atomic_get_private_obj_state(&state->base,
bw_state          333 drivers/gpu/drm/i915/display/intel_bw.c 	if (IS_ERR(bw_state))
bw_state          334 drivers/gpu/drm/i915/display/intel_bw.c 		return ERR_CAST(bw_state);
bw_state          336 drivers/gpu/drm/i915/display/intel_bw.c 	return to_intel_bw_state(bw_state);
bw_state          343 drivers/gpu/drm/i915/display/intel_bw.c 	struct intel_bw_state *bw_state = NULL;
bw_state          372 drivers/gpu/drm/i915/display/intel_bw.c 		bw_state  = intel_atomic_get_bw_state(state);
bw_state          373 drivers/gpu/drm/i915/display/intel_bw.c 		if (IS_ERR(bw_state))
bw_state          374 drivers/gpu/drm/i915/display/intel_bw.c 			return PTR_ERR(bw_state);
bw_state          376 drivers/gpu/drm/i915/display/intel_bw.c 		bw_state->data_rate[crtc->pipe] = new_data_rate;
bw_state          377 drivers/gpu/drm/i915/display/intel_bw.c 		bw_state->num_active_planes[crtc->pipe] = new_active_planes;
bw_state          381 drivers/gpu/drm/i915/display/intel_bw.c 			      bw_state->data_rate[crtc->pipe],
bw_state          382 drivers/gpu/drm/i915/display/intel_bw.c 			      bw_state->num_active_planes[crtc->pipe]);
bw_state          385 drivers/gpu/drm/i915/display/intel_bw.c 	if (!bw_state)
bw_state          388 drivers/gpu/drm/i915/display/intel_bw.c 	data_rate = intel_bw_data_rate(dev_priv, bw_state);
bw_state          389 drivers/gpu/drm/i915/display/intel_bw.c 	num_active_planes = intel_bw_num_active_planes(dev_priv, bw_state);
bw_state           29 drivers/gpu/drm/i915/display/intel_bw.h void intel_bw_crtc_update(struct intel_bw_state *bw_state,
bw_state         7038 drivers/gpu/drm/i915/display/intel_display.c 	struct intel_bw_state *bw_state =
bw_state         7103 drivers/gpu/drm/i915/display/intel_display.c 	bw_state->data_rate[intel_crtc->pipe] = 0;
bw_state         7104 drivers/gpu/drm/i915/display/intel_display.c 	bw_state->num_active_planes[intel_crtc->pipe] = 0;
bw_state         16776 drivers/gpu/drm/i915/display/intel_display.c 		struct intel_bw_state *bw_state =
bw_state         16832 drivers/gpu/drm/i915/display/intel_display.c 		intel_bw_crtc_update(bw_state, crtc_state);