bw_limit 735 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c float bw_limit; bw_limit 1275 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c bw_limit = dc->dcn_soc->percent_disp_bw_limit * v->fabric_and_dram_bandwidth_vmax0p9; bw_limit 1276 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c bw_limit_pass = (v->total_data_read_bandwidth / 1000.0) < bw_limit; bw_limit 324 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h u32 bw_limit; bw_limit 332 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h u32 bw_limit; bw_limit 902 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h u32 bw_limit; /* VSI BW Limit (0 = disabled) */ bw_limit 556 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c vport->bw_limit = hdev->tm_info.pg_info[0].bw_limit; bw_limit 597 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c hdev->tm_info.tc_info[i].bw_limit = bw_limit 598 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c hdev->tm_info.pg_info[0].bw_limit; bw_limit 628 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c hdev->tm_info.pg_info[i].bw_limit = HCLGE_ETHER_MAX_RATE; bw_limit 702 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c hdev->tm_info.pg_info[i].bw_limit, bw_limit 828 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c hdev->tm_info.tc_info[i].bw_limit, bw_limit 861 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c ret = hclge_shaper_para_calc(vport->bw_limit, HCLGE_SHAPER_LVL_VF, bw_limit 895 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c hdev->tm_info.tc_info[i].bw_limit, bw_limit 716 drivers/net/ethernet/intel/i40e/i40e.h u16 bw_limit; bw_limit 807 drivers/net/ethernet/intel/i40e/i40e.h u16 bw_limit; /* VSI BW Limit (0 = disabled) */ bw_limit 432 drivers/net/ethernet/intel/i40e/i40e_debugfs.c vsi->bw_limit, vsi->bw_max_quanta); bw_limit 5211 drivers/net/ethernet/intel/i40e/i40e_main.c vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit); bw_limit 13769 drivers/net/ethernet/intel/i40e/i40e_main.c veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);