busdev 56 arch/ia64/include/asm/pci.h #define PCI_CONTROLLER(busdev) ((struct pci_controller *) busdev->sysdata) busdev 57 arch/ia64/include/asm/pci.h #define pci_domain_nr(busdev) (PCI_CONTROLLER(busdev)->segment) busdev 2903 drivers/net/ethernet/sun/sunhme.c struct pci_dev *busdev = pdev->bus->self; busdev 2907 drivers/net/ethernet/sun/sunhme.c if (busdev == NULL || busdev 2908 drivers/net/ethernet/sun/sunhme.c busdev->vendor != PCI_VENDOR_ID_DEC || busdev 2909 drivers/net/ethernet/sun/sunhme.c busdev->device != PCI_DEVICE_ID_DEC_21153) busdev 532 drivers/pci/controller/dwc/pcie-designware-host.c u32 busdev, cfg_size; busdev 537 drivers/pci/controller/dwc/pcie-designware-host.c busdev = PCIE_ATU_BUS(bus->number) | PCIE_ATU_DEV(PCI_SLOT(devfn)) | busdev 554 drivers/pci/controller/dwc/pcie-designware-host.c busdev, cfg_size); busdev 163 drivers/pci/controller/pcie-rockchip-host.c u32 busdev; busdev 165 drivers/pci/controller/pcie-rockchip-host.c busdev = PCIE_ECAM_ADDR(bus->number, PCI_SLOT(devfn), busdev 168 drivers/pci/controller/pcie-rockchip-host.c if (!IS_ALIGNED(busdev, size)) { busdev 181 drivers/pci/controller/pcie-rockchip-host.c *val = readl(rockchip->reg_base + busdev); busdev 183 drivers/pci/controller/pcie-rockchip-host.c *val = readw(rockchip->reg_base + busdev); busdev 185 drivers/pci/controller/pcie-rockchip-host.c *val = readb(rockchip->reg_base + busdev); busdev 197 drivers/pci/controller/pcie-rockchip-host.c u32 busdev; busdev 199 drivers/pci/controller/pcie-rockchip-host.c busdev = PCIE_ECAM_ADDR(bus->number, PCI_SLOT(devfn), busdev 201 drivers/pci/controller/pcie-rockchip-host.c if (!IS_ALIGNED(busdev, size)) busdev 212 drivers/pci/controller/pcie-rockchip-host.c writel(val, rockchip->reg_base + busdev); busdev 214 drivers/pci/controller/pcie-rockchip-host.c writew(val, rockchip->reg_base + busdev); busdev 216 drivers/pci/controller/pcie-rockchip-host.c writeb(val, rockchip->reg_base + busdev);