bsc 187 arch/h8300/kernel/setup.c struct device_node *bsc; bsc 193 arch/h8300/kernel/setup.c bsc = of_find_compatible_node(NULL, NULL, "renesas,h8300-bsc"); bsc 194 arch/h8300/kernel/setup.c base = of_iomap(bsc, 0); bsc 18 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c uint32_t bsc; bsc 42 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c mdp4_dtv_encoder->bsc = msm_bus_scale_register_client( bsc 44 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c DBG("bus scale client: %08x", mdp4_dtv_encoder->bsc); bsc 53 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c if (mdp4_dtv_encoder->bsc) { bsc 54 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c msm_bus_scale_unregister_client(mdp4_dtv_encoder->bsc); bsc 55 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c mdp4_dtv_encoder->bsc = 0; bsc 61 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c if (mdp4_dtv_encoder->bsc) { bsc 63 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c msm_bus_scale_client_update_request(mdp4_dtv_encoder->bsc, idx); bsc 23 drivers/gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c uint32_t bsc; bsc 46 drivers/gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c mdp4_lcdc_encoder->bsc = msm_bus_scale_register_client( bsc 48 drivers/gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c DBG("lvds : bus scale client: %08x", mdp4_lcdc_encoder->bsc); bsc 54 drivers/gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c if (mdp4_lcdc_encoder->bsc) { bsc 55 drivers/gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c msm_bus_scale_unregister_client(mdp4_lcdc_encoder->bsc); bsc 56 drivers/gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c mdp4_lcdc_encoder->bsc = 0; bsc 62 drivers/gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c if (mdp4_lcdc_encoder->bsc) { bsc 64 drivers/gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c msm_bus_scale_client_update_request(mdp4_lcdc_encoder->bsc, idx); bsc 24 drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c if (mdp5_cmd_enc->bsc) { bsc 31 drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c msm_bus_scale_client_update_request(mdp5_cmd_enc->bsc, idx); bsc 50 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c mdp5_encoder->bsc = msm_bus_scale_register_client( bsc 52 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c DBG("bus scale client: %08x", mdp5_encoder->bsc); bsc 57 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c if (mdp5_encoder->bsc) { bsc 58 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c msm_bus_scale_unregister_client(mdp5_encoder->bsc); bsc 59 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c mdp5_encoder->bsc = 0; bsc 65 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c if (mdp5_encoder->bsc) { bsc 72 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c msm_bus_scale_client_update_request(mdp5_encoder->bsc, idx); bsc 163 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h uint32_t bsc; bsc 280 drivers/mtd/nand/onenand/onenand_base.c int bsa, bsc; bsc 291 drivers/mtd/nand/onenand/onenand_base.c bsc = count & ONENAND_BSC_MASK; bsc 293 drivers/mtd/nand/onenand/onenand_base.c return ((bsa << ONENAND_BSA_SHIFT) | bsc); bsc 3196 drivers/pinctrl/sh-pfc/pfc-r8a7740.c SH_PFC_FUNCTION(bsc), bsc 3643 drivers/pinctrl/sh-pfc/pfc-sh73a0.c SH_PFC_FUNCTION(bsc), bsc 122 drivers/staging/board/board.c int __init board_staging_register_clock(const struct board_staging_clk *bsc) bsc 126 drivers/staging/board/board.c pr_debug("Aliasing clock %s for con_id %s dev_id %s\n", bsc->clk, bsc 127 drivers/staging/board/board.c bsc->con_id, bsc->dev_id); bsc 128 drivers/staging/board/board.c error = clk_add_alias(bsc->con_id, bsc->dev_id, bsc->clk, NULL); bsc 130 drivers/staging/board/board.c pr_err("Failed to alias clock %s (%d)\n", bsc->clk, error); bsc 30 drivers/staging/board/board.h int board_staging_register_clock(const struct board_staging_clk *bsc);