bpe 326 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c unsigned int bpe; bpe 329 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c dcc_support_pixel_format(pipe->plane_state->format, &bpe) ? 1 : 0; bpe 973 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c unsigned int bpe; bpe 976 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c pipe->plane_state->format, &bpe) ? dcn_bw_yes : dcn_bw_no; bpe 831 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c unsigned int bpe, bpe 841 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c hubbub1_get_blk256_size(&blk256_width, &blk256_height, bpe); bpe 843 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c swath_bytes_horz_wc = width * blk256_height * bpe; bpe 844 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c swath_bytes_vert_wc = height * blk256_width * bpe; bpe 864 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c unsigned int bpe; bpe 873 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c if (!hubbub1->base.funcs->dcc_support_pixel_format(input->format, &bpe)) bpe 876 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c if (!hubbub1->base.funcs->dcc_support_swizzle(input->swizzle_mode, bpe, bpe 881 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c bpe, &req128_horz_wc, &req128_vert_wc); bpe 191 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.c unsigned int bpe, bpe 201 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.c hubbub2_get_blk256_size(&blk256_width, &blk256_height, bpe); bpe 203 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.c swath_bytes_horz_wc = width * blk256_height * bpe; bpe 204 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.c swath_bytes_vert_wc = height * blk256_width * bpe; bpe 222 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.c unsigned int bpe; bpe 232 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.c &bpe)) bpe 235 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.c if (!hubbub->funcs->dcc_support_swizzle(input->swizzle_mode, bpe, bpe 240 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.c bpe, &req128_horz_wc, &req128_vert_wc); bpe 273 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.c if ((bpe == 2) && (input->swizzle_mode == DC_SW_64KB_R_X)) bpe 183 drivers/gpu/drm/radeon/evergreen_cs.c unsigned bpe; bpe 194 drivers/gpu/drm/radeon/evergreen_cs.c surf->layer_size = surf->nbx * surf->nby * surf->bpe * surf->nsamples; bpe 195 drivers/gpu/drm/radeon/evergreen_cs.c surf->base_align = surf->bpe; bpe 208 drivers/gpu/drm/radeon/evergreen_cs.c palign = MAX(64, track->group_size / surf->bpe); bpe 209 drivers/gpu/drm/radeon/evergreen_cs.c surf->layer_size = surf->nbx * surf->nby * surf->bpe * surf->nsamples; bpe 230 drivers/gpu/drm/radeon/evergreen_cs.c palign = track->group_size / (8 * surf->bpe * surf->nsamples); bpe 232 drivers/gpu/drm/radeon/evergreen_cs.c surf->layer_size = surf->nbx * surf->nby * surf->bpe; bpe 240 drivers/gpu/drm/radeon/evergreen_cs.c track->group_size, surf->bpe, surf->nsamples); bpe 262 drivers/gpu/drm/radeon/evergreen_cs.c tileb = 64 * surf->bpe * surf->nsamples; bpe 302 drivers/gpu/drm/radeon/evergreen_cs.c surf->bpe = r600_fmt_get_blocksize(surf->format); bpe 461 drivers/gpu/drm/radeon/evergreen_cs.c size = nby * surf.nbx * surf.bpe * surf.nsamples; bpe 486 drivers/gpu/drm/radeon/evergreen_cs.c surf.mode, surf.bpe, surf.nsamples, bpe 922 drivers/gpu/drm/radeon/evergreen_cs.c surf.mode, surf.bpe, surf.nsamples, bpe 520 drivers/gpu/drm/radeon/r600_cs.c u32 nviews, bpe, ntiles, size, slice_tile_max, tmp; bpe 536 drivers/gpu/drm/radeon/r600_cs.c bpe = 2; bpe 543 drivers/gpu/drm/radeon/r600_cs.c bpe = 4; bpe 546 drivers/gpu/drm/radeon/r600_cs.c bpe = 8; bpe 558 drivers/gpu/drm/radeon/r600_cs.c tmp = (tmp / bpe) >> 6; bpe 561 drivers/gpu/drm/radeon/r600_cs.c track->db_depth_size, bpe, track->db_offset, bpe 582 drivers/gpu/drm/radeon/r600_cs.c array_check.blocksize = bpe; bpe 622 drivers/gpu/drm/radeon/r600_cs.c tmp = ntiles * bpe * 64 * nviews * track->nsamples; bpe 626 drivers/gpu/drm/radeon/r600_cs.c track->db_depth_size, ntiles, nviews, bpe, tmp + track->db_offset,