bp_adjust_pixel_clock_params  402 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	struct bp_adjust_pixel_clock_parameters bp_adjust_pixel_clock_params = {
bp_adjust_pixel_clock_params  440 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	bp_adjust_pixel_clock_params.pixel_clock = requested_clk_100hz / 10;
bp_adjust_pixel_clock_params  441 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	bp_adjust_pixel_clock_params.
bp_adjust_pixel_clock_params  443 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	bp_adjust_pixel_clock_params.signal_type = pix_clk_params->signal_type;
bp_adjust_pixel_clock_params  444 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	bp_adjust_pixel_clock_params.
bp_adjust_pixel_clock_params  447 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 			clk_src->bios, &bp_adjust_pixel_clock_params);
bp_adjust_pixel_clock_params  451 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 			bp_adjust_pixel_clock_params.adjusted_pixel_clock * 10;
bp_adjust_pixel_clock_params  453 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 			bp_adjust_pixel_clock_params.reference_divider;
bp_adjust_pixel_clock_params  455 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 			bp_adjust_pixel_clock_params.pixel_clock_post_divider;