box_ctl 59 arch/x86/events/intel/uncore.h unsigned box_ctl; box_ctl 201 arch/x86/events/intel/uncore.h return box->pmu->type->box_ctl + box_ctl 207 arch/x86/events/intel/uncore.h return box->pmu->type->box_ctl; box_ctl 245 arch/x86/events/intel/uncore.h if (!box->pmu->type->box_ctl) box_ctl 247 arch/x86/events/intel/uncore.h return box->pmu->type->box_ctl + uncore_msr_box_offset(box); box_ctl 289 arch/x86/events/intel/uncore_nhmex.c .box_ctl = NHMEX_U_MSR_PMON_GLOBAL_CTL, box_ctl 321 arch/x86/events/intel/uncore_nhmex.c .box_ctl = NHMEX_C0_MSR_PMON_GLOBAL_CTL, box_ctl 343 arch/x86/events/intel/uncore_nhmex.c .box_ctl = NHMEX_W_MSR_GLOBAL_CTL, box_ctl 432 arch/x86/events/intel/uncore_nhmex.c .box_ctl = NHMEX_B0_MSR_PMON_GLOBAL_CTL, box_ctl 509 arch/x86/events/intel/uncore_nhmex.c .box_ctl = NHMEX_S0_MSR_PMON_GLOBAL_CTL, box_ctl 935 arch/x86/events/intel/uncore_nhmex.c .box_ctl = NHMEX_M0_MSR_GLOBAL_CTL, box_ctl 1198 arch/x86/events/intel/uncore_nhmex.c .box_ctl = NHMEX_R_MSR_GLOBAL_CTL, box_ctl 466 arch/x86/events/intel/uncore_snbep.c int box_ctl = uncore_pci_box_ctl(box); box_ctl 469 arch/x86/events/intel/uncore_snbep.c if (!pci_read_config_dword(pdev, box_ctl, &config)) { box_ctl 471 arch/x86/events/intel/uncore_snbep.c pci_write_config_dword(pdev, box_ctl, config); box_ctl 478 arch/x86/events/intel/uncore_snbep.c int box_ctl = uncore_pci_box_ctl(box); box_ctl 481 arch/x86/events/intel/uncore_snbep.c if (!pci_read_config_dword(pdev, box_ctl, &config)) { box_ctl 483 arch/x86/events/intel/uncore_snbep.c pci_write_config_dword(pdev, box_ctl, config); box_ctl 518 arch/x86/events/intel/uncore_snbep.c int box_ctl = uncore_pci_box_ctl(box); box_ctl 520 arch/x86/events/intel/uncore_snbep.c pci_write_config_dword(pdev, box_ctl, SNBEP_PMON_BOX_CTL_INT); box_ctl 962 arch/x86/events/intel/uncore_snbep.c .box_ctl = SNBEP_C0_MSR_PMON_BOX_CTL, box_ctl 1072 arch/x86/events/intel/uncore_snbep.c .box_ctl = SNBEP_PCU_MSR_PMON_BOX_CTL, box_ctl 1154 arch/x86/events/intel/uncore_snbep.c .box_ctl = SNBEP_PCI_PMON_BOX_CTL, \ box_ctl 1186 arch/x86/events/intel/uncore_snbep.c .box_ctl = SNBEP_PCI_PMON_BOX_CTL, box_ctl 1422 arch/x86/events/intel/uncore_snbep.c .box_ctl = SNBEP_PCI_PMON_BOX_CTL, \ box_ctl 1665 arch/x86/events/intel/uncore_snbep.c .box_ctl = SNBEP_C0_MSR_PMON_BOX_CTL, box_ctl 1688 arch/x86/events/intel/uncore_snbep.c .box_ctl = SNBEP_PCU_MSR_PMON_BOX_CTL, box_ctl 1776 arch/x86/events/intel/uncore_snbep.c .box_ctl = SNBEP_PCI_PMON_BOX_CTL, box_ctl 1801 arch/x86/events/intel/uncore_snbep.c .box_ctl = SNBEP_PCI_PMON_BOX_CTL, box_ctl 2086 arch/x86/events/intel/uncore_snbep.c .box_ctl = HSWEP_C0_MSR_PMON_BOX_CTL, box_ctl 2120 arch/x86/events/intel/uncore_snbep.c .box_ctl = HSWEP_PCU_MSR_PMON_BOX_CTL, box_ctl 2140 arch/x86/events/intel/uncore_snbep.c int box_ctl = uncore_pci_box_ctl(box); box_ctl 2142 arch/x86/events/intel/uncore_snbep.c pci_write_config_dword(pdev, box_ctl, 0); box_ctl 2180 arch/x86/events/intel/uncore_snbep.c .box_ctl = KNL_UCLK_MSR_PMON_BOX_CTL, box_ctl 2196 arch/x86/events/intel/uncore_snbep.c .box_ctl = KNL_MC0_CH0_MSR_PMON_BOX_CTL, box_ctl 2212 arch/x86/events/intel/uncore_snbep.c .box_ctl = KNL_UCLK_MSR_PMON_BOX_CTL, box_ctl 2228 arch/x86/events/intel/uncore_snbep.c .box_ctl = KNL_EDC0_ECLK_MSR_PMON_BOX_CTL, box_ctl 2270 arch/x86/events/intel/uncore_snbep.c .box_ctl = KNL_IRP_PCI_PMON_BOX_CTL, box_ctl 2649 arch/x86/events/intel/uncore_snbep.c .box_ctl = HSWEP_C0_MSR_PMON_BOX_CTL, box_ctl 2704 arch/x86/events/intel/uncore_snbep.c .box_ctl = HSWEP_S0_MSR_PMON_BOX_CTL, box_ctl 2739 arch/x86/events/intel/uncore_snbep.c .box_ctl = HSWEP_PCU_MSR_PMON_BOX_CTL, box_ctl 2833 arch/x86/events/intel/uncore_snbep.c .box_ctl = SNBEP_PCI_PMON_BOX_CTL, box_ctl 2846 arch/x86/events/intel/uncore_snbep.c .box_ctl = SNBEP_PCI_PMON_BOX_CTL, box_ctl 3089 arch/x86/events/intel/uncore_snbep.c .box_ctl = HSWEP_C0_MSR_PMON_BOX_CTL, box_ctl 3105 arch/x86/events/intel/uncore_snbep.c .box_ctl = HSWEP_S0_MSR_PMON_BOX_CTL, box_ctl 3177 arch/x86/events/intel/uncore_snbep.c .box_ctl = SNBEP_PCI_PMON_BOX_CTL, box_ctl 3190 arch/x86/events/intel/uncore_snbep.c .box_ctl = SNBEP_PCI_PMON_BOX_CTL, box_ctl 3527 arch/x86/events/intel/uncore_snbep.c .box_ctl = HSWEP_C0_MSR_PMON_BOX_CTL, box_ctl 3587 arch/x86/events/intel/uncore_snbep.c .box_ctl = SKX_IIO0_MSR_PMON_BOX_CTL, box_ctl 3698 arch/x86/events/intel/uncore_snbep.c .box_ctl = SKX_IRP0_MSR_PMON_BOX_CTL, box_ctl 3739 arch/x86/events/intel/uncore_snbep.c .box_ctl = HSWEP_PCU_MSR_PMON_BOX_CTL, box_ctl 3796 arch/x86/events/intel/uncore_snbep.c .box_ctl = SNBEP_PCI_PMON_BOX_CTL, box_ctl 3841 arch/x86/events/intel/uncore_snbep.c .box_ctl = SKX_UPI_PCI_PMON_BOX_CTL, box_ctl 3871 arch/x86/events/intel/uncore_snbep.c .box_ctl = SKX_M2M_PCI_PMON_BOX_CTL, box_ctl 3890 arch/x86/events/intel/uncore_snbep.c .box_ctl = SNBEP_PCI_PMON_BOX_CTL, box_ctl 3916 arch/x86/events/intel/uncore_snbep.c .box_ctl = SNBEP_PCI_PMON_BOX_CTL, box_ctl 4108 arch/x86/events/intel/uncore_snbep.c .box_ctl = SNR_CHA_MSR_PMON_BOX_CTL, box_ctl 4141 arch/x86/events/intel/uncore_snbep.c .box_ctl = SNR_IIO_MSR_PMON_BOX_CTL, box_ctl 4155 arch/x86/events/intel/uncore_snbep.c .box_ctl = SNR_IRP0_MSR_PMON_BOX_CTL, box_ctl 4168 arch/x86/events/intel/uncore_snbep.c .box_ctl = SNR_M2PCIE_MSR_PMON_BOX_CTL, box_ctl 4204 arch/x86/events/intel/uncore_snbep.c .box_ctl = SNR_PCU_MSR_PMON_BOX_CTL, box_ctl 4283 arch/x86/events/intel/uncore_snbep.c int box_ctl = uncore_pci_box_ctl(box); box_ctl 4286 arch/x86/events/intel/uncore_snbep.c pci_write_config_dword(pdev, box_ctl, IVBEP_PMON_BOX_CTL_INT); box_ctl 4321 arch/x86/events/intel/uncore_snbep.c .box_ctl = SNR_M2M_PCI_PMON_BOX_CTL, box_ctl 4386 arch/x86/events/intel/uncore_snbep.c unsigned int box_ctl = uncore_mmio_box_ctl(box); box_ctl 4399 arch/x86/events/intel/uncore_snbep.c addr += box_ctl; box_ctl 4488 arch/x86/events/intel/uncore_snbep.c .box_ctl = SNR_IMC_MMIO_PMON_BOX_CTL,