boot_reg          158 arch/arm/mach-bcm/platsmp.c 	void __iomem *boot_reg;
boot_reg          175 arch/arm/mach-bcm/platsmp.c 	boot_reg = ioremap_nocache((phys_addr_t)secondary_boot_addr,
boot_reg          177 arch/arm/mach-bcm/platsmp.c 	if (!boot_reg) {
boot_reg          192 arch/arm/mach-bcm/platsmp.c 	writel_relaxed(boot_val, boot_reg);
boot_reg          198 arch/arm/mach-bcm/platsmp.c 	while (!timeout && readl_relaxed(boot_reg) == boot_val)
boot_reg          201 arch/arm/mach-bcm/platsmp.c 	iounmap(boot_reg);
boot_reg           76 arch/arm/mach-exynos/firmware.c 	void __iomem *boot_reg;
boot_reg           81 arch/arm/mach-exynos/firmware.c 	boot_reg = sysram_ns_base_addr + 0x1c;
boot_reg           89 arch/arm/mach-exynos/firmware.c 		boot_reg += 4 * cpu;
boot_reg           91 arch/arm/mach-exynos/firmware.c 	writel_relaxed(boot_addr, boot_reg);
boot_reg           97 arch/arm/mach-exynos/firmware.c 	void __iomem *boot_reg;
boot_reg          102 arch/arm/mach-exynos/firmware.c 	boot_reg = sysram_ns_base_addr + 0x1c;
boot_reg          105 arch/arm/mach-exynos/firmware.c 		boot_reg += 4 * cpu;
boot_reg          107 arch/arm/mach-exynos/firmware.c 	*boot_addr = readl_relaxed(boot_reg);
boot_reg          198 arch/arm/mach-exynos/platsmp.c 	void __iomem *boot_reg;
boot_reg          200 arch/arm/mach-exynos/platsmp.c 	boot_reg = cpu_boot_reg_base();
boot_reg          201 arch/arm/mach-exynos/platsmp.c 	if (!boot_reg)
boot_reg          204 arch/arm/mach-exynos/platsmp.c 		boot_reg += 4*cpu;
boot_reg          206 arch/arm/mach-exynos/platsmp.c 		boot_reg += 4;
boot_reg          207 arch/arm/mach-exynos/platsmp.c 	return boot_reg;
boot_reg          283 arch/arm/mach-exynos/platsmp.c 		void __iomem *boot_reg = cpu_boot_reg(core_id);
boot_reg          285 arch/arm/mach-exynos/platsmp.c 		if (IS_ERR(boot_reg)) {
boot_reg          286 arch/arm/mach-exynos/platsmp.c 			ret = PTR_ERR(boot_reg);
boot_reg          289 arch/arm/mach-exynos/platsmp.c 		writel_relaxed(boot_addr, boot_reg);
boot_reg          308 arch/arm/mach-exynos/platsmp.c 		void __iomem *boot_reg = cpu_boot_reg(core_id);
boot_reg          310 arch/arm/mach-exynos/platsmp.c 		if (IS_ERR(boot_reg)) {
boot_reg          311 arch/arm/mach-exynos/platsmp.c 			ret = PTR_ERR(boot_reg);
boot_reg          314 arch/arm/mach-exynos/platsmp.c 		*boot_addr = readl_relaxed(boot_reg);