bochs              82 drivers/gpu/drm/bochs/bochs.h void bochs_hw_setmode(struct bochs_device *bochs,
bochs              84 drivers/gpu/drm/bochs/bochs.h void bochs_hw_setformat(struct bochs_device *bochs,
bochs              86 drivers/gpu/drm/bochs/bochs.h void bochs_hw_setbase(struct bochs_device *bochs,
bochs              88 drivers/gpu/drm/bochs/bochs.h int bochs_hw_load_edid(struct bochs_device *bochs);
bochs              91 drivers/gpu/drm/bochs/bochs.h int bochs_mm_init(struct bochs_device *bochs);
bochs              92 drivers/gpu/drm/bochs/bochs.h void bochs_mm_fini(struct bochs_device *bochs);
bochs              95 drivers/gpu/drm/bochs/bochs.h int bochs_kms_init(struct bochs_device *bochs);
bochs              96 drivers/gpu/drm/bochs/bochs.h void bochs_kms_fini(struct bochs_device *bochs);
bochs              22 drivers/gpu/drm/bochs/bochs_drv.c 	struct bochs_device *bochs = dev->dev_private;
bochs              24 drivers/gpu/drm/bochs/bochs_drv.c 	bochs_kms_fini(bochs);
bochs              25 drivers/gpu/drm/bochs/bochs_drv.c 	bochs_mm_fini(bochs);
bochs              27 drivers/gpu/drm/bochs/bochs_drv.c 	kfree(bochs);
bochs              33 drivers/gpu/drm/bochs/bochs_drv.c 	struct bochs_device *bochs;
bochs              36 drivers/gpu/drm/bochs/bochs_drv.c 	bochs = kzalloc(sizeof(*bochs), GFP_KERNEL);
bochs              37 drivers/gpu/drm/bochs/bochs_drv.c 	if (bochs == NULL)
bochs              39 drivers/gpu/drm/bochs/bochs_drv.c 	dev->dev_private = bochs;
bochs              40 drivers/gpu/drm/bochs/bochs_drv.c 	bochs->dev = dev;
bochs              46 drivers/gpu/drm/bochs/bochs_drv.c 	ret = bochs_mm_init(bochs);
bochs              50 drivers/gpu/drm/bochs/bochs_drv.c 	ret = bochs_kms_init(bochs);
bochs              13 drivers/gpu/drm/bochs/bochs_hw.c static void bochs_vga_writeb(struct bochs_device *bochs, u16 ioport, u8 val)
bochs              18 drivers/gpu/drm/bochs/bochs_hw.c 	if (bochs->mmio) {
bochs              20 drivers/gpu/drm/bochs/bochs_hw.c 		writeb(val, bochs->mmio + offset);
bochs              26 drivers/gpu/drm/bochs/bochs_hw.c static u16 bochs_dispi_read(struct bochs_device *bochs, u16 reg)
bochs              30 drivers/gpu/drm/bochs/bochs_hw.c 	if (bochs->mmio) {
bochs              32 drivers/gpu/drm/bochs/bochs_hw.c 		ret = readw(bochs->mmio + offset);
bochs              40 drivers/gpu/drm/bochs/bochs_hw.c static void bochs_dispi_write(struct bochs_device *bochs, u16 reg, u16 val)
bochs              42 drivers/gpu/drm/bochs/bochs_hw.c 	if (bochs->mmio) {
bochs              44 drivers/gpu/drm/bochs/bochs_hw.c 		writew(val, bochs->mmio + offset);
bochs              51 drivers/gpu/drm/bochs/bochs_hw.c static void bochs_hw_set_big_endian(struct bochs_device *bochs)
bochs              53 drivers/gpu/drm/bochs/bochs_hw.c 	if (bochs->qext_size < 8)
bochs              56 drivers/gpu/drm/bochs/bochs_hw.c 	writel(0xbebebebe, bochs->mmio + 0x604);
bochs              59 drivers/gpu/drm/bochs/bochs_hw.c static void bochs_hw_set_little_endian(struct bochs_device *bochs)
bochs              61 drivers/gpu/drm/bochs/bochs_hw.c 	if (bochs->qext_size < 8)
bochs              64 drivers/gpu/drm/bochs/bochs_hw.c 	writel(0x1e1e1e1e, bochs->mmio + 0x604);
bochs              76 drivers/gpu/drm/bochs/bochs_hw.c 	struct bochs_device *bochs = data;
bochs              83 drivers/gpu/drm/bochs/bochs_hw.c 		buf[i] = readb(bochs->mmio + start + i);
bochs              88 drivers/gpu/drm/bochs/bochs_hw.c int bochs_hw_load_edid(struct bochs_device *bochs)
bochs              92 drivers/gpu/drm/bochs/bochs_hw.c 	if (!bochs->mmio)
bochs              96 drivers/gpu/drm/bochs/bochs_hw.c 	bochs_get_edid_block(bochs, header, 0, ARRAY_SIZE(header));
bochs             100 drivers/gpu/drm/bochs/bochs_hw.c 	kfree(bochs->edid);
bochs             101 drivers/gpu/drm/bochs/bochs_hw.c 	bochs->edid = drm_do_get_edid(&bochs->connector,
bochs             102 drivers/gpu/drm/bochs/bochs_hw.c 				      bochs_get_edid_block, bochs);
bochs             103 drivers/gpu/drm/bochs/bochs_hw.c 	if (bochs->edid == NULL)
bochs             111 drivers/gpu/drm/bochs/bochs_hw.c 	struct bochs_device *bochs = dev->dev_private;
bochs             124 drivers/gpu/drm/bochs/bochs_hw.c 		bochs->mmio = ioremap(ioaddr, iosize);
bochs             125 drivers/gpu/drm/bochs/bochs_hw.c 		if (bochs->mmio == NULL) {
bochs             136 drivers/gpu/drm/bochs/bochs_hw.c 		bochs->ioports = 1;
bochs             139 drivers/gpu/drm/bochs/bochs_hw.c 	id = bochs_dispi_read(bochs, VBE_DISPI_INDEX_ID);
bochs             140 drivers/gpu/drm/bochs/bochs_hw.c 	mem = bochs_dispi_read(bochs, VBE_DISPI_INDEX_VIDEO_MEMORY_64K)
bochs             162 drivers/gpu/drm/bochs/bochs_hw.c 	bochs->fb_map = ioremap(addr, size);
bochs             163 drivers/gpu/drm/bochs/bochs_hw.c 	if (bochs->fb_map == NULL) {
bochs             167 drivers/gpu/drm/bochs/bochs_hw.c 	bochs->fb_base = addr;
bochs             168 drivers/gpu/drm/bochs/bochs_hw.c 	bochs->fb_size = size;
bochs             173 drivers/gpu/drm/bochs/bochs_hw.c 		 bochs->ioports ? "ioports" : "mmio",
bochs             176 drivers/gpu/drm/bochs/bochs_hw.c 	if (bochs->mmio && pdev->revision >= 2) {
bochs             177 drivers/gpu/drm/bochs/bochs_hw.c 		bochs->qext_size = readl(bochs->mmio + 0x600);
bochs             178 drivers/gpu/drm/bochs/bochs_hw.c 		if (bochs->qext_size < 4 || bochs->qext_size > iosize) {
bochs             179 drivers/gpu/drm/bochs/bochs_hw.c 			bochs->qext_size = 0;
bochs             183 drivers/gpu/drm/bochs/bochs_hw.c 			  bochs->qext_size);
bochs             184 drivers/gpu/drm/bochs/bochs_hw.c 		bochs_hw_set_native_endian(bochs);
bochs             193 drivers/gpu/drm/bochs/bochs_hw.c 	struct bochs_device *bochs = dev->dev_private;
bochs             195 drivers/gpu/drm/bochs/bochs_hw.c 	if (bochs->mmio)
bochs             196 drivers/gpu/drm/bochs/bochs_hw.c 		iounmap(bochs->mmio);
bochs             197 drivers/gpu/drm/bochs/bochs_hw.c 	if (bochs->ioports)
bochs             199 drivers/gpu/drm/bochs/bochs_hw.c 	if (bochs->fb_map)
bochs             200 drivers/gpu/drm/bochs/bochs_hw.c 		iounmap(bochs->fb_map);
bochs             202 drivers/gpu/drm/bochs/bochs_hw.c 	kfree(bochs->edid);
bochs             205 drivers/gpu/drm/bochs/bochs_hw.c void bochs_hw_setmode(struct bochs_device *bochs,
bochs             208 drivers/gpu/drm/bochs/bochs_hw.c 	bochs->xres = mode->hdisplay;
bochs             209 drivers/gpu/drm/bochs/bochs_hw.c 	bochs->yres = mode->vdisplay;
bochs             210 drivers/gpu/drm/bochs/bochs_hw.c 	bochs->bpp = 32;
bochs             211 drivers/gpu/drm/bochs/bochs_hw.c 	bochs->stride = mode->hdisplay * (bochs->bpp / 8);
bochs             212 drivers/gpu/drm/bochs/bochs_hw.c 	bochs->yres_virtual = bochs->fb_size / bochs->stride;
bochs             215 drivers/gpu/drm/bochs/bochs_hw.c 			 bochs->xres, bochs->yres, bochs->bpp,
bochs             216 drivers/gpu/drm/bochs/bochs_hw.c 			 bochs->yres_virtual);
bochs             218 drivers/gpu/drm/bochs/bochs_hw.c 	bochs_vga_writeb(bochs, 0x3c0, 0x20); /* unblank */
bochs             220 drivers/gpu/drm/bochs/bochs_hw.c 	bochs_dispi_write(bochs, VBE_DISPI_INDEX_ENABLE,      0);
bochs             221 drivers/gpu/drm/bochs/bochs_hw.c 	bochs_dispi_write(bochs, VBE_DISPI_INDEX_BPP,         bochs->bpp);
bochs             222 drivers/gpu/drm/bochs/bochs_hw.c 	bochs_dispi_write(bochs, VBE_DISPI_INDEX_XRES,        bochs->xres);
bochs             223 drivers/gpu/drm/bochs/bochs_hw.c 	bochs_dispi_write(bochs, VBE_DISPI_INDEX_YRES,        bochs->yres);
bochs             224 drivers/gpu/drm/bochs/bochs_hw.c 	bochs_dispi_write(bochs, VBE_DISPI_INDEX_BANK,        0);
bochs             225 drivers/gpu/drm/bochs/bochs_hw.c 	bochs_dispi_write(bochs, VBE_DISPI_INDEX_VIRT_WIDTH,  bochs->xres);
bochs             226 drivers/gpu/drm/bochs/bochs_hw.c 	bochs_dispi_write(bochs, VBE_DISPI_INDEX_VIRT_HEIGHT,
bochs             227 drivers/gpu/drm/bochs/bochs_hw.c 			  bochs->yres_virtual);
bochs             228 drivers/gpu/drm/bochs/bochs_hw.c 	bochs_dispi_write(bochs, VBE_DISPI_INDEX_X_OFFSET,    0);
bochs             229 drivers/gpu/drm/bochs/bochs_hw.c 	bochs_dispi_write(bochs, VBE_DISPI_INDEX_Y_OFFSET,    0);
bochs             231 drivers/gpu/drm/bochs/bochs_hw.c 	bochs_dispi_write(bochs, VBE_DISPI_INDEX_ENABLE,
bochs             235 drivers/gpu/drm/bochs/bochs_hw.c void bochs_hw_setformat(struct bochs_device *bochs,
bochs             246 drivers/gpu/drm/bochs/bochs_hw.c 		bochs_hw_set_little_endian(bochs);
bochs             249 drivers/gpu/drm/bochs/bochs_hw.c 		bochs_hw_set_big_endian(bochs);
bochs             259 drivers/gpu/drm/bochs/bochs_hw.c void bochs_hw_setbase(struct bochs_device *bochs,
bochs             265 drivers/gpu/drm/bochs/bochs_hw.c 	bochs->stride = stride;
bochs             267 drivers/gpu/drm/bochs/bochs_hw.c 		y * bochs->stride +
bochs             268 drivers/gpu/drm/bochs/bochs_hw.c 		x * (bochs->bpp / 8);
bochs             269 drivers/gpu/drm/bochs/bochs_hw.c 	vy = offset / bochs->stride;
bochs             270 drivers/gpu/drm/bochs/bochs_hw.c 	vx = (offset % bochs->stride) * 8 / bochs->bpp;
bochs             271 drivers/gpu/drm/bochs/bochs_hw.c 	vwidth = stride * 8 / bochs->bpp;
bochs             275 drivers/gpu/drm/bochs/bochs_hw.c 	bochs_dispi_write(bochs, VBE_DISPI_INDEX_VIRT_WIDTH, vwidth);
bochs             276 drivers/gpu/drm/bochs/bochs_hw.c 	bochs_dispi_write(bochs, VBE_DISPI_INDEX_X_OFFSET, vx);
bochs             277 drivers/gpu/drm/bochs/bochs_hw.c 	bochs_dispi_write(bochs, VBE_DISPI_INDEX_Y_OFFSET, vy);
bochs              29 drivers/gpu/drm/bochs/bochs_kms.c static void bochs_plane_update(struct bochs_device *bochs,
bochs              34 drivers/gpu/drm/bochs/bochs_kms.c 	if (!state->fb || !bochs->stride)
bochs              38 drivers/gpu/drm/bochs/bochs_kms.c 	bochs_hw_setbase(bochs,
bochs              43 drivers/gpu/drm/bochs/bochs_kms.c 	bochs_hw_setformat(bochs, state->fb->format);
bochs              50 drivers/gpu/drm/bochs/bochs_kms.c 	struct bochs_device *bochs = pipe->crtc.dev->dev_private;
bochs              52 drivers/gpu/drm/bochs/bochs_kms.c 	bochs_hw_setmode(bochs, &crtc_state->mode);
bochs              53 drivers/gpu/drm/bochs/bochs_kms.c 	bochs_plane_update(bochs, plane_state);
bochs              59 drivers/gpu/drm/bochs/bochs_kms.c 	struct bochs_device *bochs = pipe->crtc.dev->dev_private;
bochs              62 drivers/gpu/drm/bochs/bochs_kms.c 	bochs_plane_update(bochs, pipe->plane.state);
bochs             103 drivers/gpu/drm/bochs/bochs_kms.c 	struct bochs_device *bochs =
bochs             107 drivers/gpu/drm/bochs/bochs_kms.c 	if (bochs->edid)
bochs             108 drivers/gpu/drm/bochs/bochs_kms.c 		count = drm_add_edid_modes(connector, bochs->edid);
bochs             120 drivers/gpu/drm/bochs/bochs_kms.c 	struct bochs_device *bochs =
bochs             130 drivers/gpu/drm/bochs/bochs_kms.c 	if (size * 2 > bochs->fb_size)
bochs             152 drivers/gpu/drm/bochs/bochs_kms.c 	struct bochs_device *bochs = dev->dev_private;
bochs             153 drivers/gpu/drm/bochs/bochs_kms.c 	struct drm_connector *connector = &bochs->connector;
bochs             161 drivers/gpu/drm/bochs/bochs_kms.c 	bochs_hw_load_edid(bochs);
bochs             162 drivers/gpu/drm/bochs/bochs_kms.c 	if (bochs->edid) {
bochs             165 drivers/gpu/drm/bochs/bochs_kms.c 		drm_connector_update_edid_property(connector, bochs->edid);
bochs             186 drivers/gpu/drm/bochs/bochs_kms.c int bochs_kms_init(struct bochs_device *bochs)
bochs             188 drivers/gpu/drm/bochs/bochs_kms.c 	drm_mode_config_init(bochs->dev);
bochs             190 drivers/gpu/drm/bochs/bochs_kms.c 	bochs->dev->mode_config.max_width = 8192;
bochs             191 drivers/gpu/drm/bochs/bochs_kms.c 	bochs->dev->mode_config.max_height = 8192;
bochs             193 drivers/gpu/drm/bochs/bochs_kms.c 	bochs->dev->mode_config.fb_base = bochs->fb_base;
bochs             194 drivers/gpu/drm/bochs/bochs_kms.c 	bochs->dev->mode_config.preferred_depth = 24;
bochs             195 drivers/gpu/drm/bochs/bochs_kms.c 	bochs->dev->mode_config.prefer_shadow = 0;
bochs             196 drivers/gpu/drm/bochs/bochs_kms.c 	bochs->dev->mode_config.prefer_shadow_fbdev = 1;
bochs             197 drivers/gpu/drm/bochs/bochs_kms.c 	bochs->dev->mode_config.quirk_addfb_prefer_host_byte_order = true;
bochs             199 drivers/gpu/drm/bochs/bochs_kms.c 	bochs->dev->mode_config.funcs = &bochs_mode_funcs;
bochs             201 drivers/gpu/drm/bochs/bochs_kms.c 	bochs_connector_init(bochs->dev);
bochs             202 drivers/gpu/drm/bochs/bochs_kms.c 	drm_simple_display_pipe_init(bochs->dev,
bochs             203 drivers/gpu/drm/bochs/bochs_kms.c 				     &bochs->pipe,
bochs             208 drivers/gpu/drm/bochs/bochs_kms.c 				     &bochs->connector);
bochs             210 drivers/gpu/drm/bochs/bochs_kms.c 	drm_mode_config_reset(bochs->dev);
bochs             215 drivers/gpu/drm/bochs/bochs_kms.c void bochs_kms_fini(struct bochs_device *bochs)
bochs             217 drivers/gpu/drm/bochs/bochs_kms.c 	drm_atomic_helper_shutdown(bochs->dev);
bochs             218 drivers/gpu/drm/bochs/bochs_kms.c 	drm_mode_config_cleanup(bochs->dev);
bochs               9 drivers/gpu/drm/bochs/bochs_mm.c int bochs_mm_init(struct bochs_device *bochs)
bochs              13 drivers/gpu/drm/bochs/bochs_mm.c 	vmm = drm_vram_helper_alloc_mm(bochs->dev, bochs->fb_base,
bochs              14 drivers/gpu/drm/bochs/bochs_mm.c 				       bochs->fb_size,
bochs              19 drivers/gpu/drm/bochs/bochs_mm.c void bochs_mm_fini(struct bochs_device *bochs)
bochs              21 drivers/gpu/drm/bochs/bochs_mm.c 	if (!bochs->dev->vram_mm)
bochs              24 drivers/gpu/drm/bochs/bochs_mm.c 	drm_vram_helper_release_mm(bochs->dev);