blue_reg         1191 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c 		REG_WRITE(REGAMMA_LUT_DATA, rgb->blue_reg);
blue_reg          392 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c 						    &rgb->blue_reg)) {
blue_reg          480 drivers/gpu/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c 			dm_write_reg(xfm_dce->base.ctx, addr, rgb->blue_reg);
blue_reg          275 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.c 						    &rgb->blue_reg)) {
blue_reg          481 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.c 			rgb->blue_reg        = dc_fixpt_clamp_u0d14(rgb->blue);
blue_reg          358 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c 		REG_SET(CM_RGAM_LUT_DATA, 0, CM_RGAM_LUT_DATA, rgb[i].blue_reg);
blue_reg          688 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c 		REG_SET(CM_DGAM_LUT_DATA, 0, CM_DGAM_LUT_DATA, rgb[i].blue_reg);
blue_reg          103 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp_cm.c 		REG_SET(CM_DGAM_LUT_DATA, 0, CM_DGAM_LUT_DATA, rgb[i].blue_reg);
blue_reg          193 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp_cm.c 		REG_SET(CM_BLNDGAM_LUT_DATA, 0, CM_BLNDGAM_LUT_DATA, rgb[i].blue_reg);
blue_reg          365 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp_cm.c 		blue  = rgb[i].blue_reg;
blue_reg          351 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c 		REG_SET(MPCC_OGAM_LUT_DATA[mpcc_id], 0, MPCC_OGAM_LUT_DATA, rgb[i].blue_reg);
blue_reg           77 drivers/gpu/drm/amd/display/dc/inc/hw/hw_shared.h 	uint32_t blue_reg;