block_base        464 crypto/essiv.c 	struct crypto_alg *base, *block_base;
block_base        507 crypto/essiv.c 		block_base = &skcipher_alg->base;
block_base        529 crypto/essiv.c 		block_base = &aead_alg->base;
block_base        530 crypto/essiv.c 		if (!strstarts(block_base->cra_name, "authenc(")) {
block_base        542 crypto/essiv.c 	if (!parse_cipher_name(ictx->essiv_cipher_name, block_base->cra_name)) {
block_base        562 crypto/essiv.c 			block_base->cra_name, hash_alg->base.cra_name);
block_base        575 crypto/essiv.c 		     "essiv(%s,%s)", block_base->cra_name,
block_base        579 crypto/essiv.c 		     "essiv(%s,%s)", block_base->cra_driver_name,
block_base        583 crypto/essiv.c 	base->cra_flags		= block_base->cra_flags & CRYPTO_ALG_ASYNC;
block_base        584 crypto/essiv.c 	base->cra_blocksize	= block_base->cra_blocksize;
block_base        586 crypto/essiv.c 	base->cra_alignmask	= block_base->cra_alignmask;
block_base        587 crypto/essiv.c 	base->cra_priority	= block_base->cra_priority;
block_base        245 drivers/base/regmap/internal.h 			unsigned int block_base, unsigned int start,
block_base        670 drivers/base/regmap/regcache.c 				      unsigned int block_base,
block_base        677 drivers/base/regmap/regcache.c 		regtmp = block_base + (i * map->reg_stride);
block_base        734 drivers/base/regmap/regcache.c 			    unsigned int block_base, unsigned int start,
block_base        744 drivers/base/regmap/regcache.c 		regtmp = block_base + (i * map->reg_stride);
block_base        776 drivers/base/regmap/regcache.c 			unsigned int block_base, unsigned int start,
block_base        781 drivers/base/regmap/regcache.c 					       block_base, start, end);
block_base        784 drivers/base/regmap/regcache.c 						  block_base, start, end);
block_base        184 drivers/dma/fsl-qdma.c 	void __iomem		*block_base;
block_base        201 drivers/dma/fsl-qdma.c 	void __iomem		*block_base;
block_base        512 drivers/dma/fsl-qdma.c 			queue_temp->block_base = fsl_qdma->block_base +
block_base        582 drivers/dma/fsl-qdma.c 		block = fsl_qdma->block_base +
block_base        597 drivers/dma/fsl-qdma.c 		block = fsl_qdma->block_base +
block_base        727 drivers/dma/fsl-qdma.c 	block = fsl_qdma->block_base +
block_base        839 drivers/dma/fsl-qdma.c 		block = fsl_qdma->block_base +
block_base        846 drivers/dma/fsl-qdma.c 		block = fsl_qdma->block_base +
block_base        943 drivers/dma/fsl-qdma.c 	void __iomem *block = fsl_queue->block_base;
block_base       1146 drivers/dma/fsl-qdma.c 	fsl_qdma->block_base = devm_ioremap_resource(&pdev->dev, res);
block_base       1147 drivers/dma/fsl-qdma.c 	if (IS_ERR(fsl_qdma->block_base))
block_base       1148 drivers/dma/fsl-qdma.c 		return PTR_ERR(fsl_qdma->block_base);
block_base         65 drivers/gpu/drm/i915/display/intel_bios.c static u32 _get_blocksize(const u8 *block_base)
block_base         68 drivers/gpu/drm/i915/display/intel_bios.c 	if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3)
block_base         69 drivers/gpu/drm/i915/display/intel_bios.c 		return *((const u32 *)(block_base + 4));
block_base         71 drivers/gpu/drm/i915/display/intel_bios.c 		return *((const u16 *)(block_base + 1));
block_base         79 drivers/thermal/uniphier_thermal.c 	u32 block_base;
block_base         99 drivers/thermal/uniphier_thermal.c 	regmap_write_bits(map, tdev->data->block_base + PVTCTLEN,
block_base        127 drivers/thermal/uniphier_thermal.c 	regmap_write_bits(map, tdev->data->block_base + PVTCTLMODE,
block_base        131 drivers/thermal/uniphier_thermal.c 	regmap_write_bits(map, tdev->data->block_base + EMONREPEAT,
block_base        169 drivers/thermal/uniphier_thermal.c 	regmap_write_bits(map, tdev->data->block_base + PVTCTLEN,
block_base        184 drivers/thermal/uniphier_thermal.c 	regmap_write_bits(map, tdev->data->block_base + PVTCTLEN,
block_base        338 drivers/thermal/uniphier_thermal.c 	.block_base      = 0xe000,
block_base        344 drivers/thermal/uniphier_thermal.c 	.block_base      = 0xe800,