blnd_inst          89 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.c 	unsigned int blnd_inst,
blnd_inst         111 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.c 		if (REG(BLND_CONTROL[blnd_inst]) == REG(BLNDV_CONTROL) ||
blnd_inst         112 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.c 				blnd_inst == 0)
blnd_inst         117 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.c 	REG_UPDATE(BLND_CONTROL[blnd_inst],
blnd_inst         121 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.c 		REG_UPDATE_3(BLND_CONTROL[blnd_inst],
blnd_inst         830 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h 	unsigned int blnd_inst, enum blnd_mode mode);