bits_per_component 260 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c DC_LOG_DSC("\tbits_per_component %d", pps->bits_per_component); bits_per_component 347 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c dsc_reg_vals->pps.bits_per_component = dsc_dc_color_depth_to_dsc_bits_per_comp(dsc_cfg->color_depth); bits_per_component 471 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c reg_vals->pps.bits_per_component = 8; bits_per_component 530 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c DSCCIF_CONFIG0__BITS_PER_COMPONENT, reg_vals->pps.bits_per_component); bits_per_component 558 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c DSCC_PPS_CONFIG0__BITS_PER_COMPONENT, reg_vals->pps.bits_per_component); bits_per_component 36 drivers/gpu/drm/amd/display/dc/dsc/rc_calc_dpi.c to->bits_per_component = from->bits_per_component; bits_per_component 108 drivers/gpu/drm/amd/display/dc/dsc/rc_calc_dpi.c enum bits_per_comp bpc = (pps->bits_per_component == 8) ? BPC_8 : bits_per_component 109 drivers/gpu/drm/amd/display/dc/dsc/rc_calc_dpi.c (pps->bits_per_component == 10) ? BPC_10 : BPC_12; bits_per_component 138 drivers/gpu/drm/amd/display/dc/dsc/rc_calc_dpi.c dsc_cfg.mux_word_size = dsc_params->pps.bits_per_component <= 10 ? 48 : 64; bits_per_component 90 drivers/gpu/drm/drm_dsc.c dsc_cfg->bits_per_component << DSC_PPS_BPC_SHIFT; bits_per_component 290 drivers/gpu/drm/drm_dsc.c (4 * vdsc_cfg->bits_per_component + 4) bits_per_component 294 drivers/gpu/drm/drm_dsc.c (4 * vdsc_cfg->bits_per_component + 4) + bits_per_component 295 drivers/gpu/drm/drm_dsc.c 3 * (4 * vdsc_cfg->bits_per_component) - 2; bits_per_component 298 drivers/gpu/drm/drm_dsc.c (4 * vdsc_cfg->bits_per_component + 4) + bits_per_component 299 drivers/gpu/drm/drm_dsc.c 2 * (4 * vdsc_cfg->bits_per_component) - 2; bits_per_component 304 drivers/gpu/drm/i915/display/intel_vdsc.c static int get_column_index_for_rc_params(u8 bits_per_component) bits_per_component 306 drivers/gpu/drm/i915/display/intel_vdsc.c switch (bits_per_component) { bits_per_component 382 drivers/gpu/drm/i915/display/intel_vdsc.c vdsc_cfg->bits_per_component = pipe_config->pipe_bpp / 3; bits_per_component 404 drivers/gpu/drm/i915/display/intel_vdsc.c get_column_index_for_rc_params(vdsc_cfg->bits_per_component); bits_per_component 444 drivers/gpu/drm/i915/display/intel_vdsc.c if (vdsc_cfg->bits_per_component == 8 || bits_per_component 445 drivers/gpu/drm/i915/display/intel_vdsc.c vdsc_cfg->bits_per_component == 10) bits_per_component 447 drivers/gpu/drm/i915/display/intel_vdsc.c else if (vdsc_cfg->bits_per_component == 12) bits_per_component 500 drivers/gpu/drm/i915/display/intel_vdsc.c vdsc_cfg->bits_per_component << DSC_BPC_SHIFT | bits_per_component 84 include/drm/drm_dsc.h u8 bits_per_component;