batch_len         264 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c 	u32 batch_len; /** Length of batch within object */
batch_len         301 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c 		 eb->args->batch_len);
batch_len        1932 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c 	if ((exec->batch_start_offset | exec->batch_len) & 0x7)
batch_len        1998 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c 	pool = intel_engine_pool_get(&eb->engine->pool, eb->batch_len);
batch_len        2016 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c 				      eb->batch_len,
batch_len        2100 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c 					eb->batch_len,
batch_len        2511 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c 	eb.batch_len = args->batch_len;
batch_len        2594 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c 	    eb.batch_len > eb.batch->size - eb.batch_start_offset) {
batch_len        2600 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c 	if (eb.batch_len == 0)
batch_len        2601 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c 		eb.batch_len = eb.batch->size - eb.batch_start_offset;
batch_len        2776 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c 	exec2.batch_len = args->batch_len;
batch_len        1131 drivers/gpu/drm/i915/i915_cmd_parser.c 		       u32 batch_len,
batch_len        1161 drivers/gpu/drm/i915/i915_cmd_parser.c 					    ALIGN(batch_len, 16));
batch_len        1179 drivers/gpu/drm/i915/i915_cmd_parser.c 			batch_len = roundup(batch_len,
batch_len        1183 drivers/gpu/drm/i915/i915_cmd_parser.c 		for (n = batch_start_offset >> PAGE_SHIFT; batch_len; n++) {
batch_len        1184 drivers/gpu/drm/i915/i915_cmd_parser.c 			int len = min_t(int, batch_len, PAGE_SIZE - offset);
batch_len        1193 drivers/gpu/drm/i915/i915_cmd_parser.c 			batch_len -= len;
batch_len        1311 drivers/gpu/drm/i915/i915_cmd_parser.c 			 u32 batch_len,
batch_len        1337 drivers/gpu/drm/i915/i915_cmd_parser.c 	if (jump_offset >= batch_len) {
batch_len        1367 drivers/gpu/drm/i915/i915_cmd_parser.c static void init_whitelist(struct i915_gem_context *ctx, u32 batch_len)
batch_len        1369 drivers/gpu/drm/i915/i915_cmd_parser.c 	const u32 batch_cmds = DIV_ROUND_UP(batch_len, sizeof(u32));
batch_len        1428 drivers/gpu/drm/i915/i915_cmd_parser.c 			    u32 batch_len,
batch_len        1439 drivers/gpu/drm/i915/i915_cmd_parser.c 			 batch_start_offset, batch_len,
batch_len        1446 drivers/gpu/drm/i915/i915_cmd_parser.c 	init_whitelist(ctx, batch_len);
batch_len        1453 drivers/gpu/drm/i915/i915_cmd_parser.c 	batch_end = cmd + (batch_len / sizeof(*batch_end));
batch_len        1489 drivers/gpu/drm/i915/i915_cmd_parser.c 					    batch_len, batch_start,
batch_len        2420 drivers/gpu/drm/i915/i915_drv.h 			    u32 batch_len,
batch_len         917 include/uapi/drm/i915_drm.h 	__u32 batch_len;
batch_len        1020 include/uapi/drm/i915_drm.h 	__u32 batch_len;
batch_len         917 tools/include/uapi/drm/i915_drm.h 	__u32 batch_len;
batch_len        1020 tools/include/uapi/drm/i915_drm.h 	__u32 batch_len;