base_reg 59 arch/arm/mach-omap1/irq.c unsigned long base_reg; base_reg 117 arch/arm/mach-omap1/irq.c { .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3f8e22f }, base_reg 118 arch/arm/mach-omap1/irq.c { .base_reg = OMAP_IH2_BASE, .trigger_map = 0xfdb9c1f2 }, base_reg 119 arch/arm/mach-omap1/irq.c { .base_reg = OMAP_IH2_BASE + 0x100, .trigger_map = 0x800040f3 }, base_reg 125 arch/arm/mach-omap1/irq.c { .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3febfff }, base_reg 126 arch/arm/mach-omap1/irq.c { .base_reg = OMAP_IH2_BASE, .trigger_map = 0xffbfffed }, base_reg 129 arch/arm/mach-omap1/irq.c { .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3faefc3 }, base_reg 130 arch/arm/mach-omap1/irq.c { .base_reg = OMAP_IH2_BASE, .trigger_map = 0x65b3c061 }, base_reg 137 arch/arm/mach-omap1/irq.c { .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3fefe8f }, base_reg 138 arch/arm/mach-omap1/irq.c { .base_reg = OMAP_IH2_BASE, .trigger_map = 0xfdb7c1fd }, base_reg 139 arch/arm/mach-omap1/irq.c { .base_reg = OMAP_IH2_BASE + 0x100, .trigger_map = 0xffffb7ff }, base_reg 140 arch/arm/mach-omap1/irq.c { .base_reg = OMAP_IH2_BASE + 0x200, .trigger_map = 0xffffffff }, base_reg 223 arch/arm/mach-omap1/irq.c irq_banks[i].va = ioremap(irq_banks[i].base_reg, 0xff); base_reg 159 arch/mips/kernel/mips-cm.c u32 base_reg; base_reg 165 arch/mips/kernel/mips-cm.c base_reg = read_gcr_l2_only_sync_base(); base_reg 166 arch/mips/kernel/mips-cm.c if (base_reg & CM_GCR_L2_ONLY_SYNC_BASE_SYNCEN) base_reg 167 arch/mips/kernel/mips-cm.c return base_reg & CM_GCR_L2_ONLY_SYNC_BASE_SYNCBASE; base_reg 203 arch/mips/kernel/mips-cm.c u32 base_reg; base_reg 223 arch/mips/kernel/mips-cm.c base_reg = read_gcr_base(); base_reg 224 arch/mips/kernel/mips-cm.c if ((base_reg & CM_GCR_BASE_GCRBASE) != addr) { base_reg 100 arch/nds32/kernel/traps.c static void __dump(struct task_struct *tsk, unsigned long *base_reg) base_reg 106 arch/nds32/kernel/traps.c while (!kstack_end(base_reg)) { base_reg 107 arch/nds32/kernel/traps.c ret_addr = *base_reg++; base_reg 117 arch/nds32/kernel/traps.c while (!kstack_end((void *)base_reg) && base_reg 118 arch/nds32/kernel/traps.c !((unsigned long)base_reg & 0x3) && base_reg 119 arch/nds32/kernel/traps.c ((unsigned long)base_reg >= TASK_SIZE)) { base_reg 121 arch/nds32/kernel/traps.c ret_addr = base_reg[LP_OFFSET]; base_reg 122 arch/nds32/kernel/traps.c next_fp = base_reg[FP_OFFSET]; base_reg 131 arch/nds32/kernel/traps.c base_reg = (unsigned long *)next_fp; base_reg 139 arch/nds32/kernel/traps.c unsigned long *base_reg; base_reg 145 arch/nds32/kernel/traps.c base_reg = (unsigned long *)(tsk->thread.cpu_context.sp); base_reg 147 arch/nds32/kernel/traps.c __asm__ __volatile__("\tori\t%0, $sp, #0\n":"=r"(base_reg)); base_reg 150 arch/nds32/kernel/traps.c base_reg = (unsigned long *)(tsk->thread.cpu_context.fp); base_reg 152 arch/nds32/kernel/traps.c __asm__ __volatile__("\tori\t%0, $fp, #0\n":"=r"(base_reg)); base_reg 154 arch/nds32/kernel/traps.c __dump(tsk, base_reg); base_reg 214 arch/powerpc/perf/imc-pmu.c u32 handle, base_reg; base_reg 243 arch/powerpc/perf/imc-pmu.c of_property_read_u32(node, "reg", &base_reg); base_reg 253 arch/powerpc/perf/imc-pmu.c ret = imc_parse_event(np, g_scale, g_unit, prefix, base_reg, &pmu->events[ct]); base_reg 38 arch/sparc/include/asm/winmacro.h #define LOAD_PT_INS(base_reg) \ base_reg 39 arch/sparc/include/asm/winmacro.h ldd [%base_reg + STACKFRAME_SZ + PT_I0], %i0; \ base_reg 40 arch/sparc/include/asm/winmacro.h ldd [%base_reg + STACKFRAME_SZ + PT_I2], %i2; \ base_reg 41 arch/sparc/include/asm/winmacro.h ldd [%base_reg + STACKFRAME_SZ + PT_I4], %i4; \ base_reg 42 arch/sparc/include/asm/winmacro.h ldd [%base_reg + STACKFRAME_SZ + PT_I6], %i6; base_reg 44 arch/sparc/include/asm/winmacro.h #define LOAD_PT_GLOBALS(base_reg) \ base_reg 45 arch/sparc/include/asm/winmacro.h ld [%base_reg + STACKFRAME_SZ + PT_G1], %g1; \ base_reg 46 arch/sparc/include/asm/winmacro.h ldd [%base_reg + STACKFRAME_SZ + PT_G2], %g2; \ base_reg 47 arch/sparc/include/asm/winmacro.h ldd [%base_reg + STACKFRAME_SZ + PT_G4], %g4; \ base_reg 48 arch/sparc/include/asm/winmacro.h ldd [%base_reg + STACKFRAME_SZ + PT_G6], %g6; base_reg 50 arch/sparc/include/asm/winmacro.h #define LOAD_PT_YREG(base_reg, scratch) \ base_reg 51 arch/sparc/include/asm/winmacro.h ld [%base_reg + STACKFRAME_SZ + PT_Y], %scratch; \ base_reg 54 arch/sparc/include/asm/winmacro.h #define LOAD_PT_PRIV(base_reg, pt_psr, pt_pc, pt_npc) \ base_reg 55 arch/sparc/include/asm/winmacro.h ld [%base_reg + STACKFRAME_SZ + PT_PSR], %pt_psr; \ base_reg 56 arch/sparc/include/asm/winmacro.h ld [%base_reg + STACKFRAME_SZ + PT_PC], %pt_pc; \ base_reg 57 arch/sparc/include/asm/winmacro.h ld [%base_reg + STACKFRAME_SZ + PT_NPC], %pt_npc; base_reg 59 arch/sparc/include/asm/winmacro.h #define LOAD_PT_ALL(base_reg, pt_psr, pt_pc, pt_npc, scratch) \ base_reg 60 arch/sparc/include/asm/winmacro.h LOAD_PT_YREG(base_reg, scratch) \ base_reg 61 arch/sparc/include/asm/winmacro.h LOAD_PT_INS(base_reg) \ base_reg 62 arch/sparc/include/asm/winmacro.h LOAD_PT_GLOBALS(base_reg) \ base_reg 63 arch/sparc/include/asm/winmacro.h LOAD_PT_PRIV(base_reg, pt_psr, pt_pc, pt_npc) base_reg 65 arch/sparc/include/asm/winmacro.h #define STORE_PT_INS(base_reg) \ base_reg 66 arch/sparc/include/asm/winmacro.h std %i0, [%base_reg + STACKFRAME_SZ + PT_I0]; \ base_reg 67 arch/sparc/include/asm/winmacro.h std %i2, [%base_reg + STACKFRAME_SZ + PT_I2]; \ base_reg 68 arch/sparc/include/asm/winmacro.h std %i4, [%base_reg + STACKFRAME_SZ + PT_I4]; \ base_reg 69 arch/sparc/include/asm/winmacro.h std %i6, [%base_reg + STACKFRAME_SZ + PT_I6]; base_reg 71 arch/sparc/include/asm/winmacro.h #define STORE_PT_GLOBALS(base_reg) \ base_reg 72 arch/sparc/include/asm/winmacro.h st %g1, [%base_reg + STACKFRAME_SZ + PT_G1]; \ base_reg 73 arch/sparc/include/asm/winmacro.h std %g2, [%base_reg + STACKFRAME_SZ + PT_G2]; \ base_reg 74 arch/sparc/include/asm/winmacro.h std %g4, [%base_reg + STACKFRAME_SZ + PT_G4]; \ base_reg 75 arch/sparc/include/asm/winmacro.h std %g6, [%base_reg + STACKFRAME_SZ + PT_G6]; base_reg 77 arch/sparc/include/asm/winmacro.h #define STORE_PT_YREG(base_reg, scratch) \ base_reg 79 arch/sparc/include/asm/winmacro.h st %scratch, [%base_reg + STACKFRAME_SZ + PT_Y]; base_reg 81 arch/sparc/include/asm/winmacro.h #define STORE_PT_PRIV(base_reg, pt_psr, pt_pc, pt_npc) \ base_reg 82 arch/sparc/include/asm/winmacro.h st %pt_psr, [%base_reg + STACKFRAME_SZ + PT_PSR]; \ base_reg 83 arch/sparc/include/asm/winmacro.h st %pt_pc, [%base_reg + STACKFRAME_SZ + PT_PC]; \ base_reg 84 arch/sparc/include/asm/winmacro.h st %pt_npc, [%base_reg + STACKFRAME_SZ + PT_NPC]; base_reg 86 arch/sparc/include/asm/winmacro.h #define STORE_PT_ALL(base_reg, reg_psr, reg_pc, reg_npc, g_scratch) \ base_reg 87 arch/sparc/include/asm/winmacro.h STORE_PT_PRIV(base_reg, reg_psr, reg_pc, reg_npc) \ base_reg 88 arch/sparc/include/asm/winmacro.h STORE_PT_GLOBALS(base_reg) \ base_reg 89 arch/sparc/include/asm/winmacro.h STORE_PT_YREG(base_reg, g_scratch) \ base_reg 90 arch/sparc/include/asm/winmacro.h STORE_PT_INS(base_reg) base_reg 1256 arch/x86/kvm/emulate.c static void adjust_modrm_seg(struct x86_emulate_ctxt *ctxt, int base_reg) base_reg 1258 arch/x86/kvm/emulate.c if (base_reg == VCPU_REGS_RSP || base_reg == VCPU_REGS_RBP) base_reg 1266 arch/x86/kvm/emulate.c int index_reg, base_reg, scale; base_reg 1272 arch/x86/kvm/emulate.c base_reg = (ctxt->rex_prefix << 3) & 8; /* REX.B */ base_reg 1276 arch/x86/kvm/emulate.c ctxt->modrm_rm = base_reg | (ctxt->modrm & 0x07); base_reg 1358 arch/x86/kvm/emulate.c base_reg |= sib & 7; base_reg 1361 arch/x86/kvm/emulate.c if ((base_reg & 7) == 5 && ctxt->modrm_mod == 0) base_reg 1364 arch/x86/kvm/emulate.c modrm_ea += reg_read(ctxt, base_reg); base_reg 1365 arch/x86/kvm/emulate.c adjust_modrm_seg(ctxt, base_reg); base_reg 1368 arch/x86/kvm/emulate.c base_reg == VCPU_REGS_RSP) base_reg 1378 arch/x86/kvm/emulate.c base_reg = ctxt->modrm_rm; base_reg 1379 arch/x86/kvm/emulate.c modrm_ea += reg_read(ctxt, base_reg); base_reg 1380 arch/x86/kvm/emulate.c adjust_modrm_seg(ctxt, base_reg); base_reg 4228 arch/x86/kvm/vmx/nested.c int base_reg = (vmx_instruction_info >> 23) & 0xf; base_reg 4244 arch/x86/kvm/vmx/nested.c off += kvm_register_read(vcpu, base_reg); base_reg 26 drivers/base/regmap/internal.h unsigned int base_reg; base_reg 27 drivers/base/regmap/regcache-rbtree.c unsigned int base_reg; base_reg 44 drivers/base/regmap/regcache-rbtree.c *base = rbnode->base_reg; base_reg 45 drivers/base/regmap/regcache-rbtree.c *top = rbnode->base_reg + ((rbnode->blklen - 1) * map->reg_stride); base_reg 68 drivers/base/regmap/regcache-rbtree.c unsigned int base_reg, top_reg; base_reg 72 drivers/base/regmap/regcache-rbtree.c regcache_rbtree_get_base_top_reg(map, rbnode, &base_reg, base_reg 74 drivers/base/regmap/regcache-rbtree.c if (reg >= base_reg && reg <= top_reg) base_reg 81 drivers/base/regmap/regcache-rbtree.c regcache_rbtree_get_base_top_reg(map, rbnode, &base_reg, base_reg 83 drivers/base/regmap/regcache-rbtree.c if (reg >= base_reg && reg <= top_reg) { base_reg 88 drivers/base/regmap/regcache-rbtree.c } else if (reg < base_reg) { base_reg 102 drivers/base/regmap/regcache-rbtree.c unsigned int base_reg; base_reg 112 drivers/base/regmap/regcache-rbtree.c base_reg = rbnode->base_reg; base_reg 115 drivers/base/regmap/regcache-rbtree.c if (base_reg >= base_reg_tmp && base_reg 116 drivers/base/regmap/regcache-rbtree.c base_reg <= top_reg_tmp) base_reg 118 drivers/base/regmap/regcache-rbtree.c else if (base_reg > top_reg_tmp) base_reg 120 drivers/base/regmap/regcache-rbtree.c else if (base_reg < base_reg_tmp) base_reg 250 drivers/base/regmap/regcache-rbtree.c reg_tmp = (reg - rbnode->base_reg) / map->reg_stride; base_reg 264 drivers/base/regmap/regcache-rbtree.c unsigned int base_reg, base_reg 274 drivers/base/regmap/regcache-rbtree.c blklen = (top_reg - base_reg) / map->reg_stride + 1; base_reg 275 drivers/base/regmap/regcache-rbtree.c pos = (reg - base_reg) / map->reg_stride; base_reg 276 drivers/base/regmap/regcache-rbtree.c offset = (rbnode->base_reg - base_reg) / map->reg_stride; base_reg 310 drivers/base/regmap/regcache-rbtree.c rbnode->base_reg = base_reg; base_reg 340 drivers/base/regmap/regcache-rbtree.c rbnode->base_reg = range->range_min; base_reg 346 drivers/base/regmap/regcache-rbtree.c rbnode->base_reg = reg; base_reg 385 drivers/base/regmap/regcache-rbtree.c reg_tmp = (reg - rbnode->base_reg) / map->reg_stride; base_reg 388 drivers/base/regmap/regcache-rbtree.c unsigned int base_reg, top_reg; base_reg 409 drivers/base/regmap/regcache-rbtree.c &base_reg, &top_reg); base_reg 411 drivers/base/regmap/regcache-rbtree.c if (base_reg <= max && top_reg >= min) { base_reg 412 drivers/base/regmap/regcache-rbtree.c if (reg < base_reg) base_reg 413 drivers/base/regmap/regcache-rbtree.c dist = base_reg - reg; base_reg 421 drivers/base/regmap/regcache-rbtree.c new_base_reg = min(reg, base_reg); base_reg 431 drivers/base/regmap/regcache-rbtree.c if (reg < base_reg) base_reg 457 drivers/base/regmap/regcache-rbtree.c reg - rbnode->base_reg, value); base_reg 471 drivers/base/regmap/regcache-rbtree.c unsigned int base_reg, top_reg; base_reg 479 drivers/base/regmap/regcache-rbtree.c regcache_rbtree_get_base_top_reg(map, rbnode, &base_reg, base_reg 481 drivers/base/regmap/regcache-rbtree.c if (base_reg > max) base_reg 486 drivers/base/regmap/regcache-rbtree.c if (min > base_reg) base_reg 487 drivers/base/regmap/regcache-rbtree.c start = (min - base_reg) / map->reg_stride; base_reg 492 drivers/base/regmap/regcache-rbtree.c end = (max - base_reg) / map->reg_stride + 1; base_reg 498 drivers/base/regmap/regcache-rbtree.c rbnode->base_reg, start, end); base_reg 512 drivers/base/regmap/regcache-rbtree.c unsigned int base_reg, top_reg; base_reg 519 drivers/base/regmap/regcache-rbtree.c regcache_rbtree_get_base_top_reg(map, rbnode, &base_reg, base_reg 521 drivers/base/regmap/regcache-rbtree.c if (base_reg > max) base_reg 526 drivers/base/regmap/regcache-rbtree.c if (min > base_reg) base_reg 527 drivers/base/regmap/regcache-rbtree.c start = (min - base_reg) / map->reg_stride; base_reg 532 drivers/base/regmap/regcache-rbtree.c end = (max - base_reg) / map->reg_stride + 1; base_reg 141 drivers/base/regmap/regmap-debugfs.c c->base_reg = i; base_reg 171 drivers/base/regmap/regmap-debugfs.c return c->base_reg + (reg_offset * map->reg_stride); base_reg 206 drivers/base/regmap/regmap-debugfs.c if (reg < c->base_reg) { base_reg 207 drivers/base/regmap/regmap-debugfs.c ret = c->base_reg; base_reg 398 drivers/base/regmap/regmap-debugfs.c c->base_reg, c->max_reg); base_reg 118 drivers/bus/uniphier-system-bus.c void __iomem *base_reg = priv->membase + UNIPHIER_SBC_BASE; base_reg 121 drivers/bus/uniphier-system-bus.c is_swapped = !(readl(base_reg) & UNIPHIER_SBC_BASE_BE); base_reg 136 drivers/bus/uniphier-system-bus.c void __iomem *base_reg = priv->membase + UNIPHIER_SBC_BASE; base_reg 171 drivers/bus/uniphier-system-bus.c writel(val, base_reg + UNIPHIER_SBC_STRIDE * i); base_reg 231 drivers/clk/tegra/clk-pll.c #define pll_readl_base(p) pll_readl(p->params->base_reg, p) base_reg 238 drivers/clk/tegra/clk-pll.c #define pll_writel_base(val, p) pll_writel(val, p->params->base_reg, p) base_reg 306 drivers/clk/tegra/clk-pll.c lock_addr += pll->params->base_reg; base_reg 2020 drivers/clk/tegra/clk-pll.c val = readl_relaxed(clk_base + pll_params->base_reg); base_reg 2631 drivers/clk/tegra/clk-pll.c val = readl_relaxed(clk_base + pll_params->base_reg); base_reg 184 drivers/clk/tegra/clk-tegra114.c .base_reg = PLLC_BASE, base_reg 235 drivers/clk/tegra/clk-tegra114.c .base_reg = PLLC2_BASE, base_reg 257 drivers/clk/tegra/clk-tegra114.c .base_reg = PLLC3_BASE, base_reg 306 drivers/clk/tegra/clk-tegra114.c .base_reg = PLLM_BASE, base_reg 346 drivers/clk/tegra/clk-tegra114.c .base_reg = PLLP_BASE, base_reg 376 drivers/clk/tegra/clk-tegra114.c .base_reg = PLLA_BASE, base_reg 412 drivers/clk/tegra/clk-tegra114.c .base_reg = PLLD_BASE, base_reg 430 drivers/clk/tegra/clk-tegra114.c .base_reg = PLLD2_BASE, base_reg 472 drivers/clk/tegra/clk-tegra114.c .base_reg = PLLU_BASE, base_reg 501 drivers/clk/tegra/clk-tegra114.c .base_reg = PLLX_BASE, base_reg 561 drivers/clk/tegra/clk-tegra114.c .base_reg = PLLE_BASE, base_reg 590 drivers/clk/tegra/clk-tegra114.c .base_reg = PLLRE_BASE, base_reg 170 drivers/clk/tegra/clk-tegra124.c .base_reg = PLLX_BASE, base_reg 204 drivers/clk/tegra/clk-tegra124.c .base_reg = PLLC_BASE, base_reg 258 drivers/clk/tegra/clk-tegra124.c .base_reg = PLLC2_BASE, base_reg 280 drivers/clk/tegra/clk-tegra124.c .base_reg = PLLC3_BASE, base_reg 339 drivers/clk/tegra/clk-tegra124.c .base_reg = PLLC4_BASE, base_reg 402 drivers/clk/tegra/clk-tegra124.c .base_reg = PLLM_BASE, base_reg 459 drivers/clk/tegra/clk-tegra124.c .base_reg = PLLE_BASE, base_reg 498 drivers/clk/tegra/clk-tegra124.c .base_reg = PLLRE_BASE, base_reg 535 drivers/clk/tegra/clk-tegra124.c .base_reg = PLLP_BASE, base_reg 564 drivers/clk/tegra/clk-tegra124.c .base_reg = PLLA_BASE, base_reg 609 drivers/clk/tegra/clk-tegra124.c .base_reg = PLLD_BASE, base_reg 636 drivers/clk/tegra/clk-tegra124.c .base_reg = PLLD2_BASE, base_reg 669 drivers/clk/tegra/clk-tegra124.c .base_reg = PLLDP_BASE, base_reg 717 drivers/clk/tegra/clk-tegra124.c .base_reg = PLLU_BASE, base_reg 284 drivers/clk/tegra/clk-tegra20.c .base_reg = PLLC_BASE, base_reg 300 drivers/clk/tegra/clk-tegra20.c .base_reg = PLLM_BASE, base_reg 316 drivers/clk/tegra/clk-tegra20.c .base_reg = PLLP_BASE, base_reg 334 drivers/clk/tegra/clk-tegra20.c .base_reg = PLLA_BASE, base_reg 350 drivers/clk/tegra/clk-tegra20.c .base_reg = PLLD_BASE, base_reg 372 drivers/clk/tegra/clk-tegra20.c .base_reg = PLLU_BASE, base_reg 389 drivers/clk/tegra/clk-tegra20.c .base_reg = PLLX_BASE, base_reg 405 drivers/clk/tegra/clk-tegra20.c .base_reg = PLLE_BASE, base_reg 708 drivers/clk/tegra/clk-tegra210.c if (readl_relaxed(clk_base + pllcx->params->base_reg) & PLL_ENABLE) { base_reg 757 drivers/clk/tegra/clk-tegra210.c u32 val = readl_relaxed(clk_base + plla->params->base_reg); base_reg 794 drivers/clk/tegra/clk-tegra210.c writel_relaxed(val, clk_base + plla->params->base_reg); base_reg 813 drivers/clk/tegra/clk-tegra210.c if (readl_relaxed(clk_base + plld->params->base_reg) & base_reg 863 drivers/clk/tegra/clk-tegra210.c u32 val = readl_relaxed(clk_base + plldss->params->base_reg); base_reg 914 drivers/clk/tegra/clk-tegra210.c plldss->params->base_reg); base_reg 929 drivers/clk/tegra/clk-tegra210.c writel_relaxed(val, clk_base + plldss->params->base_reg); base_reg 982 drivers/clk/tegra/clk-tegra210.c u32 val = readl_relaxed(clk_base + pllre->params->base_reg); base_reg 1026 drivers/clk/tegra/clk-tegra210.c writel_relaxed(val, clk_base + pllre->params->base_reg); base_reg 1111 drivers/clk/tegra/clk-tegra210.c if (readl_relaxed(clk_base + pllx->params->base_reg) & PLL_ENABLE) { base_reg 1160 drivers/clk/tegra/clk-tegra210.c u32 mask, val = readl_relaxed(clk_base + pllmb->params->base_reg); base_reg 1221 drivers/clk/tegra/clk-tegra210.c u32 val = readl_relaxed(clk_base + pllp->params->base_reg); base_reg 1284 drivers/clk/tegra/clk-tegra210.c u32 val = readl_relaxed(clk_base + pllu->base_reg); base_reg 1375 drivers/clk/tegra/clk-tegra210.c base = readl_relaxed(clk_base + pllx->params->base_reg) & base_reg 1378 drivers/clk/tegra/clk-tegra210.c writel_relaxed(base, clk_base + pllx->params->base_reg); base_reg 1583 drivers/clk/tegra/clk-tegra210.c .base_reg = PLLX_BASE, base_reg 1634 drivers/clk/tegra/clk-tegra210.c .base_reg = PLLC_BASE, base_reg 1673 drivers/clk/tegra/clk-tegra210.c .base_reg = PLLC2_BASE, base_reg 1703 drivers/clk/tegra/clk-tegra210.c .base_reg = PLLC3_BASE, base_reg 1768 drivers/clk/tegra/clk-tegra210.c .base_reg = PLLC4_BASE, base_reg 1822 drivers/clk/tegra/clk-tegra210.c .base_reg = PLLM_BASE, base_reg 1849 drivers/clk/tegra/clk-tegra210.c .base_reg = PLLMB_BASE, base_reg 1894 drivers/clk/tegra/clk-tegra210.c .base_reg = PLLE_BASE, base_reg 1931 drivers/clk/tegra/clk-tegra210.c .base_reg = PLLRE_BASE, base_reg 1970 drivers/clk/tegra/clk-tegra210.c .base_reg = PLLP_BASE, base_reg 1993 drivers/clk/tegra/clk-tegra210.c .base_reg = PLLA1_BASE, base_reg 2043 drivers/clk/tegra/clk-tegra210.c .base_reg = PLLA_BASE, base_reg 2090 drivers/clk/tegra/clk-tegra210.c .base_reg = PLLD_BASE, base_reg 2129 drivers/clk/tegra/clk-tegra210.c .base_reg = PLLD2_BASE, base_reg 2173 drivers/clk/tegra/clk-tegra210.c .base_reg = PLLDP_BASE, base_reg 2225 drivers/clk/tegra/clk-tegra210.c .base_reg = PLLU_BASE, base_reg 358 drivers/clk/tegra/clk-tegra30.c .base_reg = PLLC_BASE, base_reg 387 drivers/clk/tegra/clk-tegra30.c .base_reg = PLLM_BASE, base_reg 408 drivers/clk/tegra/clk-tegra30.c .base_reg = PLLP_BASE, base_reg 426 drivers/clk/tegra/clk-tegra30.c .base_reg = PLLA_BASE, base_reg 443 drivers/clk/tegra/clk-tegra30.c .base_reg = PLLD_BASE, base_reg 460 drivers/clk/tegra/clk-tegra30.c .base_reg = PLLD2_BASE, base_reg 477 drivers/clk/tegra/clk-tegra30.c .base_reg = PLLU_BASE, base_reg 495 drivers/clk/tegra/clk-tegra30.c .base_reg = PLLX_BASE, base_reg 512 drivers/clk/tegra/clk-tegra30.c .base_reg = PLLE_BASE, base_reg 245 drivers/clk/tegra/clk.h u32 base_reg; base_reg 957 drivers/edac/amd64_edac.c u32 base_reg, base_reg_sec; base_reg 971 drivers/edac/amd64_edac.c base_reg = umc_base_reg + (cs * 4); base_reg 974 drivers/edac/amd64_edac.c if (!amd_smn_read(pvt->mc_node_id, base_reg, base)) base_reg 976 drivers/edac/amd64_edac.c umc, cs, *base, base_reg); base_reg 159 drivers/gpu/drm/sun4i/sun8i_csc.c u32 base_reg; base_reg 173 drivers/gpu/drm/sun4i/sun8i_csc.c base_reg = SUN8I_CSC_COEFF(base, 0); base_reg 174 drivers/gpu/drm/sun4i/sun8i_csc.c regmap_bulk_write(map, base_reg, table, 12); base_reg 183 drivers/gpu/drm/sun4i/sun8i_csc.c u32 base_reg; base_reg 197 drivers/gpu/drm/sun4i/sun8i_csc.c base_reg = SUN50I_MIXER_BLEND_CSC_COEFF(DE3_BLD_BASE, layer, 0, 0); base_reg 198 drivers/gpu/drm/sun4i/sun8i_csc.c regmap_bulk_write(map, base_reg, table, 12); base_reg 788 drivers/iio/imu/kmx61.c u8 base_reg; base_reg 795 drivers/iio/imu/kmx61.c base_reg = KMX61_ACC_XOUT_L; base_reg 798 drivers/iio/imu/kmx61.c base_reg = KMX61_MAG_XOUT_L; base_reg 811 drivers/iio/imu/kmx61.c ret = kmx61_read_measurement(data, base_reg, chan->scan_index); base_reg 39 drivers/input/keyboard/tm2-touchkey.c u8 base_reg; base_reg 59 drivers/input/keyboard/tm2-touchkey.c .base_reg = 0x00, base_reg 66 drivers/input/keyboard/tm2-touchkey.c .base_reg = 0x00, base_reg 80 drivers/input/keyboard/tm2-touchkey.c .base_reg = 0x00, base_reg 108 drivers/input/keyboard/tm2-touchkey.c touchkey->variant->base_reg, data); base_reg 764 drivers/media/dvb-frontends/cx24117.c u8 base_reg = (state->demod == 0) ? base_reg 768 drivers/media/dvb-frontends/cx24117.c ret = cx24117_readregN(state, base_reg, buf, 4); base_reg 82 drivers/media/dvb-frontends/dibx000_common.c while (((status = dibx000_read_word(mst, mst->base_reg + 2)) & 0x0100) == 0 && --i > 0) base_reg 105 drivers/media/dvb-frontends/dibx000_common.c dibx000_read_word(mst, mst->base_reg + 2); base_reg 112 drivers/media/dvb-frontends/dibx000_common.c dibx000_write_word(mst, mst->base_reg, data); base_reg 129 drivers/media/dvb-frontends/dibx000_common.c dibx000_write_word(mst, mst->base_reg+1, da); base_reg 161 drivers/media/dvb-frontends/dibx000_common.c dibx000_write_word(mst, mst->base_reg+1, da); base_reg 169 drivers/media/dvb-frontends/dibx000_common.c da = dibx000_read_word(mst, mst->base_reg); base_reg 188 drivers/media/dvb-frontends/dibx000_common.c return dibx000_write_word(mst, mst->base_reg + 3, (u16)(60000 / speed)); base_reg 204 drivers/media/dvb-frontends/dibx000_common.c return dibx000_write_word(mst, mst->base_reg + 4, intf); base_reg 277 drivers/media/dvb-frontends/dibx000_common.c tx[0] = (((mst->base_reg + 1) >> 8) & 0xff); base_reg 278 drivers/media/dvb-frontends/dibx000_common.c tx[1] = ((mst->base_reg + 1) & 0xff); base_reg 458 drivers/media/dvb-frontends/dibx000_common.c mst->base_reg = 1024; base_reg 460 drivers/media/dvb-frontends/dibx000_common.c mst->base_reg = 768; base_reg 31 drivers/media/dvb-frontends/dibx000_common.h u16 base_reg; base_reg 233 drivers/misc/habanalabs/goya/goya_coresight.c u64 base_reg; base_reg 241 drivers/misc/habanalabs/goya/goya_coresight.c base_reg = debug_stm_regs[params->reg_idx] - CFG_BASE; base_reg 243 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0xFB0, CORESIGHT_UNLOCK); base_reg 251 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0xE80, 0x80004); base_reg 252 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0xD64, 7); base_reg 253 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0xD60, 0); base_reg 254 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0xD00, lower_32_bits(input->he_mask)); base_reg 255 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0xD20, lower_32_bits(input->sp_mask)); base_reg 256 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0xD60, 1); base_reg 257 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0xD00, upper_32_bits(input->he_mask)); base_reg 258 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0xD20, upper_32_bits(input->sp_mask)); base_reg 259 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0xE70, 0x10); base_reg 260 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0xE60, 0); base_reg 261 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0xE64, 0x420000); base_reg 262 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0xE00, 0xFFFFFFFF); base_reg 263 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0xE20, 0xFFFFFFFF); base_reg 264 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0xEF4, input->id); base_reg 265 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0xDF4, 0x80); base_reg 266 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0xE8C, input->frequency); base_reg 267 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0xE90, 0x7FF); base_reg 268 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0xE80, 0x7 | (input->id << 16)); base_reg 270 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0xE80, 4); base_reg 271 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0xD64, 0); base_reg 272 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0xD60, 1); base_reg 273 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0xD00, 0); base_reg 274 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0xD20, 0); base_reg 275 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0xD60, 0); base_reg 276 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0xE20, 0); base_reg 277 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0xE00, 0); base_reg 278 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0xDF4, 0x80); base_reg 279 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0xE70, 0); base_reg 280 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0xE60, 0); base_reg 281 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0xE64, 0); base_reg 282 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0xE8C, 0); base_reg 284 drivers/misc/habanalabs/goya/goya_coresight.c rc = goya_coresight_timeout(hdev, base_reg + 0xE80, 23, false); base_reg 292 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0xE80, 4); base_reg 302 drivers/misc/habanalabs/goya/goya_coresight.c u64 base_reg; base_reg 311 drivers/misc/habanalabs/goya/goya_coresight.c base_reg = debug_etf_regs[params->reg_idx] - CFG_BASE; base_reg 313 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0xFB0, CORESIGHT_UNLOCK); base_reg 315 drivers/misc/habanalabs/goya/goya_coresight.c val = RREG32(base_reg + 0x304); base_reg 317 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x304, val); base_reg 319 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x304, val); base_reg 321 drivers/misc/habanalabs/goya/goya_coresight.c rc = goya_coresight_timeout(hdev, base_reg + 0x304, 6, false); base_reg 329 drivers/misc/habanalabs/goya/goya_coresight.c rc = goya_coresight_timeout(hdev, base_reg + 0xC, 2, true); base_reg 337 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x20, 0); base_reg 345 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x34, 0x3FFC); base_reg 346 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x28, input->sink_mode); base_reg 347 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x304, 0x4001); base_reg 348 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x308, 0xA); base_reg 349 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x20, 1); base_reg 351 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x34, 0); base_reg 352 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x28, 0); base_reg 353 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x304, 0); base_reg 380 drivers/misc/habanalabs/goya/goya_coresight.c u64 base_reg = mmPSOC_ETR_BASE - CFG_BASE; base_reg 384 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0xFB0, CORESIGHT_UNLOCK); base_reg 386 drivers/misc/habanalabs/goya/goya_coresight.c val = RREG32(base_reg + 0x304); base_reg 388 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x304, val); base_reg 390 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x304, val); base_reg 392 drivers/misc/habanalabs/goya/goya_coresight.c rc = goya_coresight_timeout(hdev, base_reg + 0x304, 6, false); base_reg 399 drivers/misc/habanalabs/goya/goya_coresight.c rc = goya_coresight_timeout(hdev, base_reg + 0xC, 2, true); base_reg 406 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x20, 0); base_reg 426 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x34, 0x3FFC); base_reg 427 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x4, input->buffer_size); base_reg 428 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x28, input->sink_mode); base_reg 429 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x110, 0x700); base_reg 430 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x118, base_reg 432 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x11C, base_reg 434 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x304, 3); base_reg 435 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x308, 0xA); base_reg 436 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x20, 1); base_reg 438 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x34, 0); base_reg 439 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x4, 0x400); base_reg 440 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x118, 0); base_reg 441 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x11C, 0); base_reg 442 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x308, 0); base_reg 443 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x28, 0); base_reg 444 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x304, 0); base_reg 454 drivers/misc/habanalabs/goya/goya_coresight.c rwp = RREG32(base_reg + 0x18); base_reg 455 drivers/misc/habanalabs/goya/goya_coresight.c rwphi = RREG32(base_reg + 0x3c) & 0xff; base_reg 466 drivers/misc/habanalabs/goya/goya_coresight.c u64 base_reg; base_reg 473 drivers/misc/habanalabs/goya/goya_coresight.c base_reg = debug_funnel_regs[params->reg_idx] - CFG_BASE; base_reg 475 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0xFB0, CORESIGHT_UNLOCK); base_reg 477 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg, params->enable ? 0x33F : 0); base_reg 486 drivers/misc/habanalabs/goya/goya_coresight.c u64 base_reg; base_reg 494 drivers/misc/habanalabs/goya/goya_coresight.c base_reg = debug_bmon_regs[params->reg_idx] - CFG_BASE; base_reg 496 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x104, 1); base_reg 504 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x200, lower_32_bits(input->start_addr0)); base_reg 505 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x204, upper_32_bits(input->start_addr0)); base_reg 506 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x208, lower_32_bits(input->addr_mask0)); base_reg 507 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x20C, upper_32_bits(input->addr_mask0)); base_reg 508 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x240, lower_32_bits(input->start_addr1)); base_reg 509 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x244, upper_32_bits(input->start_addr1)); base_reg 510 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x248, lower_32_bits(input->addr_mask1)); base_reg 511 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x24C, upper_32_bits(input->addr_mask1)); base_reg 512 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x224, 0); base_reg 513 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x234, 0); base_reg 514 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x30C, input->bw_win); base_reg 515 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x308, input->win_capture); base_reg 524 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x700, pcie_base | 0xB00 | (input->id << 12)); base_reg 525 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x708, pcie_base | 0xA00 | (input->id << 12)); base_reg 526 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x70C, pcie_base | 0xC00 | (input->id << 12)); base_reg 528 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x100, 0x11); base_reg 529 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x304, 0x1); base_reg 531 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x200, 0); base_reg 532 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x204, 0); base_reg 533 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x208, 0xFFFFFFFF); base_reg 534 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x20C, 0xFFFFFFFF); base_reg 535 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x240, 0); base_reg 536 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x244, 0); base_reg 537 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x248, 0xFFFFFFFF); base_reg 538 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x24C, 0xFFFFFFFF); base_reg 539 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x224, 0xFFFFFFFF); base_reg 540 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x234, 0x1070F); base_reg 541 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x30C, 0); base_reg 542 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x308, 0xFFFF); base_reg 543 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x700, 0xA000B00); base_reg 544 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x708, 0xA000A00); base_reg 545 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x70C, 0xA000C00); base_reg 546 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x100, 1); base_reg 547 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x304, 0); base_reg 548 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0x104, 0); base_reg 557 drivers/misc/habanalabs/goya/goya_coresight.c u64 base_reg; base_reg 571 drivers/misc/habanalabs/goya/goya_coresight.c base_reg = debug_spmu_regs[params->reg_idx] - CFG_BASE; base_reg 591 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0xE04, 0x41013046); base_reg 592 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0xE04, 0x41013040); base_reg 595 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + SPMU_EVENT_TYPES_OFFSET + i * 4, base_reg 598 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0xE04, 0x41013041); base_reg 599 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0xC00, 0x8000003F); base_reg 622 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0xE04, 0x41013040); base_reg 625 drivers/misc/habanalabs/goya/goya_coresight.c output[i] = RREG32(base_reg + i * 8); base_reg 627 drivers/misc/habanalabs/goya/goya_coresight.c output[overflow_idx] = RREG32(base_reg + 0xCC0); base_reg 629 drivers/misc/habanalabs/goya/goya_coresight.c output[cycle_cnt_idx] = RREG32(base_reg + 0xFC); base_reg 631 drivers/misc/habanalabs/goya/goya_coresight.c output[cycle_cnt_idx] |= RREG32(base_reg + 0xF8); base_reg 633 drivers/misc/habanalabs/goya/goya_coresight.c WREG32(base_reg + 0xCC0, 0); base_reg 650 drivers/mtd/spi-nor/aspeed-smc.c u32 reg, base_reg; base_reg 680 drivers/mtd/spi-nor/aspeed-smc.c base_reg = reg & CONTROL_KEEP_MASK; base_reg 681 drivers/mtd/spi-nor/aspeed-smc.c if (base_reg != reg) { base_reg 684 drivers/mtd/spi-nor/aspeed-smc.c base_reg); base_reg 686 drivers/mtd/spi-nor/aspeed-smc.c chip->ctl_val[smc_base] = base_reg; base_reg 51 drivers/net/dsa/mv88e6xxx/global2_scratch.c int base_reg, unsigned int offset, base_reg 54 drivers/net/dsa/mv88e6xxx/global2_scratch.c int reg = base_reg + (offset / 8); base_reg 77 drivers/net/dsa/mv88e6xxx/global2_scratch.c int base_reg, unsigned int offset, base_reg 80 drivers/net/dsa/mv88e6xxx/global2_scratch.c int reg = base_reg + (offset / 8); base_reg 875 drivers/net/ethernet/broadcom/bnx2x/bnx2x_init_ops.h u32 base_reg, u32 reg) base_reg 880 drivers/net/ethernet/broadcom/bnx2x/bnx2x_init_ops.h REG_WR(bp, base_reg + i*4, base_reg 647 drivers/net/wireless/intel/iwlwifi/fw/file.h __le32 base_reg; base_reg 1446 drivers/net/wireless/intel/iwlwifi/iwl-drv.c dest_tlv->base_reg = pieces->dbg_dest_tlv->cfg_reg; base_reg 964 drivers/net/wireless/intel/iwlwifi/pcie/trans.c iwl_write_prph(trans, le32_to_cpu(dest->base_reg), base_reg 3096 drivers/net/wireless/intel/iwlwifi/pcie/trans.c base = le32_to_cpu(trans->dbg.dest_tlv->base_reg); base_reg 3188 drivers/net/wireless/intel/iwlwifi/pcie/trans.c cfg_reg = le32_to_cpu(trans->dbg.dest_tlv->base_reg); base_reg 3200 drivers/net/wireless/intel/iwlwifi/pcie/trans.c base = le32_to_cpu(trans->dbg.dest_tlv->base_reg); base_reg 843 drivers/ntb/hw/intel/ntb_hw_gen1.c unsigned long base_reg, xlat_reg, limit_reg; base_reg 875 drivers/ntb/hw/intel/ntb_hw_gen1.c base_reg = bar0_off(ndev->xlat_reg->bar0_base, bar); base_reg 880 drivers/ntb/hw/intel/ntb_hw_gen1.c base = ioread64(mmio + base_reg) & NTB_BAR_MASK_64; base_reg 911 drivers/ntb/hw/intel/ntb_hw_gen1.c base = ioread32(mmio + base_reg) & NTB_BAR_MASK_32; base_reg 71 drivers/pci/controller/pcie-iproc.c #define MAP_REG(base_reg, index) ((base_reg) + (index) * 2) base_reg 128 drivers/staging/gasket/apex_driver.c .base_reg = APEX_BAR2_REG_KERNEL_HIB_PAGE_TABLE, base_reg 136 drivers/staging/gasket/gasket_core.h int base_reg; base_reg 251 drivers/staging/gasket/gasket_page_table.c page_table_config->base_reg, base_reg 287 drivers/staging/gasket/gasket_page_table.c (u64 __iomem *)&bar_data->virt_base[page_table_config->base_reg]; base_reg 51 drivers/watchdog/rdc321x_wdt.c int base_reg; base_reg 67 drivers/watchdog/rdc321x_wdt.c rdc321x_wdt_device.base_reg, &val); base_reg 70 drivers/watchdog/rdc321x_wdt.c rdc321x_wdt_device.base_reg, val); base_reg 99 drivers/watchdog/rdc321x_wdt.c rdc321x_wdt_device.base_reg, RDC_CLS_TMR); base_reg 103 drivers/watchdog/rdc321x_wdt.c rdc321x_wdt_device.base_reg, base_reg 159 drivers/watchdog/rdc321x_wdt.c rdc321x_wdt_device.base_reg, &value); base_reg 232 drivers/watchdog/rdc321x_wdt.c rdc321x_wdt_device.base_reg = r->start; base_reg 244 drivers/watchdog/rdc321x_wdt.c rdc321x_wdt_device.base_reg, RDC_WDT_RST); base_reg 109 sound/soc/cirrus/ep93xx-i2s.c unsigned base_reg; base_reg 124 sound/soc/cirrus/ep93xx-i2s.c base_reg = EP93XX_I2S_TX0EN; base_reg 126 sound/soc/cirrus/ep93xx-i2s.c base_reg = EP93XX_I2S_RX0EN; base_reg 127 sound/soc/cirrus/ep93xx-i2s.c ep93xx_i2s_write_reg(info, base_reg, 1); base_reg 139 sound/soc/cirrus/ep93xx-i2s.c unsigned base_reg; base_reg 148 sound/soc/cirrus/ep93xx-i2s.c base_reg = EP93XX_I2S_TX0EN; base_reg 150 sound/soc/cirrus/ep93xx-i2s.c base_reg = EP93XX_I2S_RX0EN; base_reg 151 sound/soc/cirrus/ep93xx-i2s.c ep93xx_i2s_write_reg(info, base_reg, 0); base_reg 133 sound/soc/codecs/arizona.h #define ARIZONA_MUX_ENUMS(name, base_reg) \ base_reg 134 sound/soc/codecs/arizona.h static ARIZONA_MUX_ENUM_DECL(name##_enum, base_reg); \ base_reg 137 sound/soc/codecs/arizona.h #define ARIZONA_MIXER_ENUMS(name, base_reg) \ base_reg 138 sound/soc/codecs/arizona.h ARIZONA_MUX_ENUMS(name##_in1, base_reg); \ base_reg 139 sound/soc/codecs/arizona.h ARIZONA_MUX_ENUMS(name##_in2, base_reg + 2); \ base_reg 140 sound/soc/codecs/arizona.h ARIZONA_MUX_ENUMS(name##_in3, base_reg + 4); \ base_reg 141 sound/soc/codecs/arizona.h ARIZONA_MUX_ENUMS(name##_in4, base_reg + 6) base_reg 143 sound/soc/codecs/arizona.h #define ARIZONA_DSP_AUX_ENUMS(name, base_reg) \ base_reg 144 sound/soc/codecs/arizona.h ARIZONA_MUX_ENUMS(name##_aux1, base_reg); \ base_reg 145 sound/soc/codecs/arizona.h ARIZONA_MUX_ENUMS(name##_aux2, base_reg + 8); \ base_reg 146 sound/soc/codecs/arizona.h ARIZONA_MUX_ENUMS(name##_aux3, base_reg + 16); \ base_reg 147 sound/soc/codecs/arizona.h ARIZONA_MUX_ENUMS(name##_aux4, base_reg + 24); \ base_reg 148 sound/soc/codecs/arizona.h ARIZONA_MUX_ENUMS(name##_aux5, base_reg + 32); \ base_reg 149 sound/soc/codecs/arizona.h ARIZONA_MUX_ENUMS(name##_aux6, base_reg + 40) base_reg 213 sound/soc/codecs/madera.h #define MADERA_MUX_ENUMS(name, base_reg) \ base_reg 214 sound/soc/codecs/madera.h static MADERA_MUX_ENUM_DECL(name##_enum, base_reg); \ base_reg 217 sound/soc/codecs/madera.h #define MADERA_MIXER_ENUMS(name, base_reg) \ base_reg 218 sound/soc/codecs/madera.h MADERA_MUX_ENUMS(name##_in1, base_reg); \ base_reg 219 sound/soc/codecs/madera.h MADERA_MUX_ENUMS(name##_in2, base_reg + 2); \ base_reg 220 sound/soc/codecs/madera.h MADERA_MUX_ENUMS(name##_in3, base_reg + 4); \ base_reg 221 sound/soc/codecs/madera.h MADERA_MUX_ENUMS(name##_in4, base_reg + 6) base_reg 223 sound/soc/codecs/madera.h #define MADERA_DSP_AUX_ENUMS(name, base_reg) \ base_reg 224 sound/soc/codecs/madera.h MADERA_MUX_ENUMS(name##_aux1, base_reg); \ base_reg 225 sound/soc/codecs/madera.h MADERA_MUX_ENUMS(name##_aux2, base_reg + 8); \ base_reg 226 sound/soc/codecs/madera.h MADERA_MUX_ENUMS(name##_aux3, base_reg + 16); \ base_reg 227 sound/soc/codecs/madera.h MADERA_MUX_ENUMS(name##_aux4, base_reg + 24); \ base_reg 228 sound/soc/codecs/madera.h MADERA_MUX_ENUMS(name##_aux5, base_reg + 32); \ base_reg 229 sound/soc/codecs/madera.h MADERA_MUX_ENUMS(name##_aux6, base_reg + 40) base_reg 1087 sound/soc/codecs/wm2200.c #define WM2200_MIXER_ENUMS(name, base_reg) \ base_reg 1088 sound/soc/codecs/wm2200.c static WM2200_MUX_ENUM_DECL(name##_in1_enum, base_reg); \ base_reg 1089 sound/soc/codecs/wm2200.c static WM2200_MUX_ENUM_DECL(name##_in2_enum, base_reg + 2); \ base_reg 1090 sound/soc/codecs/wm2200.c static WM2200_MUX_ENUM_DECL(name##_in3_enum, base_reg + 4); \ base_reg 1091 sound/soc/codecs/wm2200.c static WM2200_MUX_ENUM_DECL(name##_in4_enum, base_reg + 6); \ base_reg 1097 sound/soc/codecs/wm2200.c #define WM2200_DSP_ENUMS(name, base_reg) \ base_reg 1098 sound/soc/codecs/wm2200.c static WM2200_MUX_ENUM_DECL(name##_aux1_enum, base_reg); \ base_reg 1099 sound/soc/codecs/wm2200.c static WM2200_MUX_ENUM_DECL(name##_aux2_enum, base_reg + 1); \ base_reg 1100 sound/soc/codecs/wm2200.c static WM2200_MUX_ENUM_DECL(name##_aux3_enum, base_reg + 2); \ base_reg 1101 sound/soc/codecs/wm2200.c static WM2200_MUX_ENUM_DECL(name##_aux4_enum, base_reg + 3); \ base_reg 1102 sound/soc/codecs/wm2200.c static WM2200_MUX_ENUM_DECL(name##_aux5_enum, base_reg + 4); \ base_reg 1103 sound/soc/codecs/wm2200.c static WM2200_MUX_ENUM_DECL(name##_aux6_enum, base_reg + 5); \ base_reg 393 sound/soc/codecs/wm5100.c #define WM5100_MIXER_ENUMS(name, base_reg) \ base_reg 394 sound/soc/codecs/wm5100.c static WM5100_MUX_ENUM_DECL(name##_in1_enum, base_reg); \ base_reg 395 sound/soc/codecs/wm5100.c static WM5100_MUX_ENUM_DECL(name##_in2_enum, base_reg + 2); \ base_reg 396 sound/soc/codecs/wm5100.c static WM5100_MUX_ENUM_DECL(name##_in3_enum, base_reg + 4); \ base_reg 397 sound/soc/codecs/wm5100.c static WM5100_MUX_ENUM_DECL(name##_in4_enum, base_reg + 6); \ base_reg 146 sound/soc/meson/axg-spdifin.c unsigned int base_reg, base_reg 154 sound/soc/meson/axg-spdifin.c reg = offset * regmap_get_reg_stride(map) + base_reg;