base_id          1516 arch/mips/kernel/perf_event_mipsxx.c 	unsigned int base_id = raw_id & 0x7f;
base_id          1520 arch/mips/kernel/perf_event_mipsxx.c 		if (IS_BOTH_COUNTERS_24K_EVENT(base_id))
base_id          1534 arch/mips/kernel/perf_event_mipsxx.c 		if (IS_BOTH_COUNTERS_34K_EVENT(base_id))
base_id          1540 arch/mips/kernel/perf_event_mipsxx.c 		if (IS_RANGE_P_34K_EVENT(raw_id, base_id))
base_id          1550 arch/mips/kernel/perf_event_mipsxx.c 		if (IS_BOTH_COUNTERS_74K_EVENT(base_id))
base_id          1560 arch/mips/kernel/perf_event_mipsxx.c 		if (IS_BOTH_COUNTERS_PROAPTIV_EVENT(base_id))
base_id          1573 arch/mips/kernel/perf_event_mipsxx.c 		base_id = raw_id & 0xff;
base_id          1574 arch/mips/kernel/perf_event_mipsxx.c 		if (IS_BOTH_COUNTERS_P5600_EVENT(base_id))
base_id          1586 arch/mips/kernel/perf_event_mipsxx.c 		base_id = config & 0xff;
base_id          1590 arch/mips/kernel/perf_event_mipsxx.c 		if (IS_BOTH_COUNTERS_1004K_EVENT(base_id))
base_id          1596 arch/mips/kernel/perf_event_mipsxx.c 		if (IS_RANGE_P_1004K_EVENT(raw_id, base_id))
base_id          1605 arch/mips/kernel/perf_event_mipsxx.c 		if (IS_BOTH_COUNTERS_INTERAPTIV_EVENT(base_id))
base_id          1611 arch/mips/kernel/perf_event_mipsxx.c 		if (IS_RANGE_P_INTERAPTIV_EVENT(raw_id, base_id))
base_id          1620 arch/mips/kernel/perf_event_mipsxx.c 		if (IS_BOTH_COUNTERS_BMIPS5000_EVENT(base_id))
base_id          1631 arch/mips/kernel/perf_event_mipsxx.c 	raw_event.event_id = base_id;
base_id          1639 arch/mips/kernel/perf_event_mipsxx.c 	unsigned int base_id = raw_id & 0x7f;
base_id          1643 arch/mips/kernel/perf_event_mipsxx.c 	raw_event.event_id = base_id;
base_id          1646 arch/mips/kernel/perf_event_mipsxx.c 		if (base_id > 0x42)
base_id          1649 arch/mips/kernel/perf_event_mipsxx.c 		if (base_id > 0x3a)
base_id          1653 arch/mips/kernel/perf_event_mipsxx.c 	switch (base_id) {
base_id            14 drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/vpstate.h 	u8 base_id;
base_id            60 drivers/gpu/drm/nouveau/nvkm/subdev/bios/vpstate.c 		h->base_id  = nvbios_rd08(b, h->offset + 0x0f);
base_id           666 drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c 		if (!nvbios_vpstate_entry(bios, &h, h.base_id, &base))
base_id           384 drivers/hwspinlock/hwspinlock_core.c 	id += hwlock->bank->base_id;
base_id           487 drivers/hwspinlock/hwspinlock_core.c 		const struct hwspinlock_ops *ops, int base_id, int num_locks)
base_id           500 drivers/hwspinlock/hwspinlock_core.c 	bank->base_id = base_id;
base_id           509 drivers/hwspinlock/hwspinlock_core.c 		ret = hwspin_lock_register_single(hwlock, base_id + i);
base_id           518 drivers/hwspinlock/hwspinlock_core.c 		hwspin_lock_unregister_single(base_id + i);
base_id           542 drivers/hwspinlock/hwspinlock_core.c 		tmp = hwspin_lock_unregister_single(bank->base_id + i);
base_id           615 drivers/hwspinlock/hwspinlock_core.c 			      int base_id, int num_locks)
base_id           624 drivers/hwspinlock/hwspinlock_core.c 	ret = hwspin_lock_register(bank, dev, ops, base_id, num_locks);
base_id            57 drivers/hwspinlock/hwspinlock_internal.h 	int base_id;
base_id            66 drivers/hwspinlock/hwspinlock_internal.h 	return hwlock->bank->base_id + local_id;
base_id            83 drivers/hwspinlock/omap_hwspinlock.c 	int base_id = 0;
base_id           139 drivers/hwspinlock/omap_hwspinlock.c 						base_id, num_locks);
base_id           129 drivers/hwspinlock/u8500_hsem.c 						pdata->base_id, num_locks);
base_id          1476 drivers/irqchip/irq-gic-v3-its.c 	u32			base_id;
base_id          1486 drivers/irqchip/irq-gic-v3-its.c 		range->base_id = base;
base_id          1502 drivers/irqchip/irq-gic-v3-its.c 			*base = range->base_id;
base_id          1503 drivers/irqchip/irq-gic-v3-its.c 			range->base_id += nr_lpis;
base_id          1526 drivers/irqchip/irq-gic-v3-its.c 	if (a->base_id + a->span != b->base_id)
base_id          1528 drivers/irqchip/irq-gic-v3-its.c 	b->base_id = a->base_id;
base_id          1545 drivers/irqchip/irq-gic-v3-its.c 		if (old->base_id < base)
base_id           235 drivers/misc/pti.c 					int base_id,
base_id           263 drivers/misc/pti.c 	mc->master  = base_id;
base_id           679 drivers/net/ethernet/mellanox/mlx5/core/fs_cmd.c int mlx5_cmd_fc_bulk_query(struct mlx5_core_dev *dev, u32 base_id, int bulk_len,
base_id           688 drivers/net/ethernet/mellanox/mlx5/core/fs_cmd.c 	MLX5_SET(query_flow_counter_in, in, flow_counter_id, base_id);
base_id           113 drivers/net/ethernet/mellanox/mlx5/core/fs_cmd.h int mlx5_cmd_fc_bulk_query(struct mlx5_core_dev *dev, u32 base_id, int bulk_len,
base_id           470 drivers/net/ethernet/mellanox/mlx5/core/fs_counters.c 	u32 base_id;
base_id           494 drivers/net/ethernet/mellanox/mlx5/core/fs_counters.c 	u32 base_id;
base_id           510 drivers/net/ethernet/mellanox/mlx5/core/fs_counters.c 	err = mlx5_cmd_fc_bulk_alloc(dev, alloc_bitmask, &base_id);
base_id           514 drivers/net/ethernet/mellanox/mlx5/core/fs_counters.c 	bulk->base_id = base_id;
base_id           517 drivers/net/ethernet/mellanox/mlx5/core/fs_counters.c 		mlx5_fc_init(&bulk->fcs[i], bulk, base_id + i);
base_id           539 drivers/net/ethernet/mellanox/mlx5/core/fs_counters.c 	mlx5_cmd_fc_free(dev, bulk->base_id);
base_id           559 drivers/net/ethernet/mellanox/mlx5/core/fs_counters.c 	int fc_index = fc->id - bulk->base_id;
base_id           296 drivers/soc/ti/knav_qmss.h 	unsigned				base_id;
base_id            30 drivers/soc/ti/knav_qmss_acc.c 	range_base = kdev->base_id + range->queue_base;
base_id            96 drivers/soc/ti/knav_qmss_acc.c 	range_base = kdev->base_id + range->queue_base;
base_id           204 drivers/soc/ti/knav_qmss_queue.c 	if (kdev->base_id <= id &&
base_id           205 drivers/soc/ti/knav_qmss_queue.c 	    kdev->base_id + kdev->num_queues > id) {
base_id           206 drivers/soc/ti/knav_qmss_queue.c 		id -= kdev->base_id;
base_id           441 drivers/soc/ti/knav_qmss_queue.c 		   kdev->base_id + inst->id, inst->name);
base_id           469 drivers/soc/ti/knav_qmss_queue.c 		   dev_name(kdev->dev), kdev->base_id,
base_id           470 drivers/soc/ti/knav_qmss_queue.c 		   kdev->base_id + kdev->num_queues - 1);
base_id           597 drivers/soc/ti/knav_qmss_queue.c 		ret = qh->inst->kdev->base_id + qh->inst->id;
base_id          1235 drivers/soc/ti/knav_qmss_queue.c 		range->queue_base = temp[0] - kdev->base_id;
base_id          1803 drivers/soc/ti/knav_qmss_queue.c 	kdev->base_id    = temp[0];
base_id            53 include/linux/hwspinlock.h 	int base_id;
base_id            59 include/linux/hwspinlock.h 		const struct hwspinlock_ops *ops, int base_id, int num_locks);
base_id            80 include/linux/hwspinlock.h 			      int base_id, int num_locks);