base_hi            72 arch/x86/include/uapi/asm/mtrr.h 	__u32 base_hi;
base_hi           178 arch/x86/kernel/cpu/mtrr/cleanup.c 	u32 base_lo, base_hi, mask_lo, mask_hi;
base_hi           195 arch/x86/kernel/cpu/mtrr/cleanup.c 	base_hi = base >> 32;
base_hi           200 arch/x86/kernel/cpu/mtrr/cleanup.c 	fill_mtrr_var_range(reg, base_lo, base_hi, mask_lo, mask_hi);
base_hi           180 arch/x86/kernel/cpu/mtrr/generic.c 		base = (((u64)mtrr_state.var_ranges[i].base_hi) << 32) +
base_hi           318 arch/x86/kernel/cpu/mtrr/generic.c 	rdmsr(MTRRphysBase_MSR(index), vr->base_lo, vr->base_hi);
base_hi           324 arch/x86/kernel/cpu/mtrr/generic.c 		u32 base_lo, u32 base_hi, u32 mask_lo, u32 mask_hi)
base_hi           331 arch/x86/kernel/cpu/mtrr/generic.c 	vr[index].base_hi = base_hi;
base_hi           435 arch/x86/kernel/cpu/mtrr/generic.c 				 mtrr_state.var_ranges[i].base_hi,
base_hi           582 arch/x86/kernel/cpu/mtrr/generic.c 	u32 mask_lo, mask_hi, base_lo, base_hi;
base_hi           602 arch/x86/kernel/cpu/mtrr/generic.c 	rdmsr(MTRRphysBase_MSR(reg), base_lo, base_hi);
base_hi           625 arch/x86/kernel/cpu/mtrr/generic.c 	*base = (u64)base_hi << (32 - PAGE_SHIFT) | base_lo >> PAGE_SHIFT;
base_hi           665 arch/x86/kernel/cpu/mtrr/generic.c 	    || (vr->base_hi & (size_and_mask >> (32 - PAGE_SHIFT))) !=
base_hi           668 arch/x86/kernel/cpu/mtrr/generic.c 		mtrr_wrmsr(MTRRphysBase_MSR(index), vr->base_lo, vr->base_hi);
base_hi           851 arch/x86/kernel/cpu/mtrr/generic.c 		vr->base_hi = (base & size_and_mask) >> (32 - PAGE_SHIFT);
base_hi           855 arch/x86/kernel/cpu/mtrr/generic.c 		mtrr_wrmsr(MTRRphysBase_MSR(reg), vr->base_lo, vr->base_hi);
base_hi            54 arch/x86/kernel/cpu/mtrr/mtrr.h 		u32 base_lo, u32 base_hi, u32 mask_lo, u32 mask_hi);
base_hi            67 drivers/char/agp/nvidia-agp.c 	u32 base_hi, base_lo;
base_hi            76 drivers/char/agp/nvidia-agp.c 		rdmsr(IORR_BASE0 + 2 * iorr_addr, base_lo, base_hi);
base_hi            91 drivers/char/agp/nvidia-agp.c     base_hi = 0x0;
base_hi            95 drivers/char/agp/nvidia-agp.c     wrmsr(IORR_BASE0 + 2 * iorr_addr, base_lo, base_hi);
base_hi          1577 drivers/net/ethernet/agere/et131x.c 		u32 __iomem *base_hi;
base_hi          1585 drivers/net/ethernet/agere/et131x.c 			base_hi = &rx_dma->fbr0_base_hi;
base_hi          1591 drivers/net/ethernet/agere/et131x.c 			base_hi = &rx_dma->fbr1_base_hi;
base_hi          1605 drivers/net/ethernet/agere/et131x.c 		writel(upper_32_bits(fbr->ring_physaddr), base_hi);
base_hi           125 drivers/net/ethernet/amd/atarilance.c 	unsigned char			base_hi;	/* High word of base addr (unused) */
base_hi           133 drivers/net/ethernet/amd/atarilance.c 	unsigned char			base_hi;	/* High word of base addr (unused) */
base_hi           709 drivers/net/ethernet/amd/atarilance.c  		MEM->tx_head[i].base_hi = 0;
base_hi           719 drivers/net/ethernet/amd/atarilance.c 		MEM->rx_head[i].base_hi = 0;
base_hi           113 drivers/net/ethernet/amd/sun3lance.c 	unsigned char  base_hi;	/* High word of base addr (unused) */
base_hi           121 drivers/net/ethernet/amd/sun3lance.c 	unsigned char base_hi;	/* High word of base addr (unused) */
base_hi           468 drivers/net/ethernet/amd/sun3lance.c  		MEM->tx_head[i].base_hi =
base_hi           477 drivers/net/ethernet/amd/sun3lance.c 		MEM->rx_head[i].base_hi =
base_hi           231 drivers/parport/parport_gsc.c 				       unsigned long base_hi, int irq,
base_hi           257 drivers/parport/parport_gsc.c 	p->base_hi = base_hi;
base_hi           280 drivers/parport/parport_gsc.c 	p->base_hi = base_hi;
base_hi           204 drivers/parport/parport_gsc.h 						unsigned long base_hi,
base_hi          1993 drivers/parport/parport_ip32.c 				void __iomem *base, void __iomem *base_hi,
base_hi          1997 drivers/parport/parport_ip32.c #define r_base_hi(offset) ((u8 __iomem *)base_hi + ((offset) << regshift))
base_hi          2042 drivers/parport/parport_ip32.c 	p->base_hi = MACE_BASE + offsetof(struct sgi_mace, isa.ecp1284);
base_hi          2138 drivers/parport/parport_ip32.c 	       p->name, p->base, p->base_hi);
base_hi          2025 drivers/parport/parport_pc.c 				      unsigned long int base_hi,
base_hi          2084 drivers/parport/parport_pc.c 	p->base_hi = base_hi;
base_hi          2088 drivers/parport/parport_pc.c 	if (base_hi) {
base_hi          2089 drivers/parport/parport_pc.c 		ECR_res = request_region(base_hi, 3, p->name);
base_hi          2111 drivers/parport/parport_pc.c 	if (p->base_hi && priv->ecr)
base_hi          2112 drivers/parport/parport_pc.c 		printk(KERN_CONT " (0x%lx)", p->base_hi);
base_hi          2185 drivers/parport/parport_pc.c 		release_region(base_hi, 3);
base_hi          2254 drivers/parport/parport_pc.c 		release_region(base_hi, 3);
base_hi          2290 drivers/parport/parport_pc.c 		release_region(p->base_hi, 3);
base_hi           131 drivers/parport/procfs.c 	len += sprintf (buffer, "%lu\t%lu\n", port->base, port->base_hi);
base_hi            38 drivers/scsi/imm.c 	int base_hi;		/* Hi Base address for ECP-ISA chipset */
base_hi           283 drivers/scsi/imm.c 	int i, ppb_hi = dev->base_hi;
base_hi          1204 drivers/scsi/imm.c 	dev->base_hi = dev->dev->port->base_hi;
base_hi           225 drivers/scsi/ppa.c 	int i, ppb_hi = dev->dev->port->base_hi;
base_hi          1067 drivers/scsi/ppa.c 	ppb_hi = dev->dev->port->base_hi;
base_hi           191 include/linux/parport.h 	unsigned long base_hi;  /* base address (hi - ECR) */
base_hi             9 include/linux/parport_pc.h #define ECONTROL(p) ((p)->base_hi + 0x2)
base_hi            10 include/linux/parport_pc.h #define CONFIGB(p)  ((p)->base_hi + 0x1)
base_hi            11 include/linux/parport_pc.h #define CONFIGA(p)  ((p)->base_hi + 0x0)
base_hi            12 include/linux/parport_pc.h #define FIFO(p)     ((p)->base_hi + 0x0)
base_hi           233 include/linux/parport_pc.h 					     unsigned long base_hi,