base_address      411 arch/ia64/kernel/acpi.c 	paddr = ma->base_address;
base_address       29 arch/mips/include/asm/vr41xx/pci.h 	uint32_t base_address;
base_address       33 arch/mips/include/asm/vr41xx/pci.h 	uint32_t base_address;
base_address       51 arch/mips/pci/pci-vr41xx.c 	.base_address		= PCI_MAILBOX_BASE_ADDRESS,
base_address       55 arch/mips/pci/pci-vr41xx.c 	.base_address		= PCI_TARGET_WINDOW1_BASE_ADDRESS,
base_address      226 arch/mips/pci/pci-vr41xx.c 		val = MBADD(mailbox->base_address) | TYPE_32BITSPACE |
base_address      233 arch/mips/pci/pci-vr41xx.c 		val = PMBA(window->base_address) | TYPE_32BITSPACE |
base_address      240 arch/mips/pci/pci-vr41xx.c 		val = PMBA(window->base_address) | TYPE_32BITSPACE |
base_address      189 arch/powerpc/include/asm/mpc52xx.h 	u32 base_address;	/* XLB + 0x6c */
base_address       87 arch/sh/kernel/traps_64.c 	__u64 base_address, addr;
base_address       98 arch/sh/kernel/traps_64.c 	base_address = regs->regs[basereg];
base_address      103 arch/sh/kernel/traps_64.c 		addr = (__u64)((__s64)base_address + (displacement << width_shift));
base_address      109 arch/sh/kernel/traps_64.c 		addr = base_address + offset;
base_address      408 arch/x86/boot/compressed/acpi.c 				immovable_mem[num].start = ma->base_address;
base_address       85 arch/x86/include/uapi/asm/kvm.h 	__u64 base_address;
base_address      497 arch/x86/kvm/ioapic.c 	return ((addr >= ioapic->base_address &&
base_address      498 arch/x86/kvm/ioapic.c 		 (addr < ioapic->base_address + IOAPIC_MEM_LENGTH)));
base_address      594 arch/x86/kvm/ioapic.c 	ioapic->base_address = IOAPIC_DEFAULT_BASE_ADDRESS;
base_address      623 arch/x86/kvm/ioapic.c 	ret = kvm_io_bus_register_dev(kvm, KVM_MMIO_BUS, ioapic->base_address,
base_address       79 arch/x86/kvm/ioapic.h 	u64 base_address;
base_address     1359 arch/x86/kvm/lapic.c 	return addr >= apic->base_address &&
base_address     1360 arch/x86/kvm/lapic.c 		addr < apic->base_address + LAPIC_MMIO_LENGTH;
base_address     1367 arch/x86/kvm/lapic.c 	u32 offset = address - apic->base_address;
base_address     1997 arch/x86/kvm/lapic.c 	unsigned int offset = address - apic->base_address;
base_address     2147 arch/x86/kvm/lapic.c 	apic->base_address = apic->vcpu->arch.apic_base &
base_address     2151 arch/x86/kvm/lapic.c 	     apic->base_address != APIC_DEFAULT_PHYS_BASE)
base_address       41 arch/x86/kvm/lapic.h 	unsigned long base_address;
base_address      141 arch/x86/math-emu/get_address.c 	unsigned long base_address, limit, address, seg_top;
base_address      163 arch/x86/math-emu/get_address.c 	base_address = seg_get_base(&descriptor);
base_address      164 arch/x86/math-emu/get_address.c 	address = base_address + offset;
base_address      167 arch/x86/math-emu/get_address.c 	limit += base_address - 1;
base_address      168 arch/x86/math-emu/get_address.c 	if (limit < base_address)
base_address      175 arch/x86/math-emu/get_address.c 			seg_top = base_address + (1 << 20);
base_address      176 arch/x86/math-emu/get_address.c 			if (seg_top < base_address)
base_address      184 arch/x86/math-emu/get_address.c 		    (address > limit) || (address < base_address) ? 0 :
base_address      228 drivers/acpi/arm64/gtdt.c 		    !gtdt_frame->base_address || !gtdt_frame->timer_interrupt)
base_address      259 drivers/acpi/arm64/gtdt.c 		frame->cntbase = gtdt_frame->base_address;
base_address     1194 drivers/acpi/arm64/iort.c 	res[num_res].start = smmu->base_address;
base_address     1195 drivers/acpi/arm64/iort.c 	res[num_res].end = smmu->base_address +
base_address     1266 drivers/acpi/arm64/iort.c 			smmu->base_address,
base_address     1303 drivers/acpi/arm64/iort.c 	res[num_res].start = smmu->base_address;
base_address     1304 drivers/acpi/arm64/iort.c 	res[num_res].end = smmu->base_address + smmu->span - 1;
base_address      582 drivers/acpi/cppc_acpi.c 			acpi_os_ioremap(cppc_ss->base_address, cppc_ss->length);
base_address      137 drivers/acpi/numa.c 				 (unsigned long long)p->base_address,
base_address      266 drivers/acpi/numa.c 	start = ma->base_address;
base_address      193 drivers/acpi/tables.c 				 p->uid, p->base_address,
base_address      205 drivers/acpi/tables.c 				 p->gic_id, p->base_address,
base_address      487 drivers/bus/fsl-mc/dprc.c 		region_desc->base_address = le64_to_cpu(rsp_params->base_addr);
base_address      489 drivers/bus/fsl-mc/dprc.c 		region_desc->base_address = 0;
base_address      495 drivers/bus/fsl-mc/fsl-mc-bus.c 		if (region_desc.base_address)
base_address      496 drivers/bus/fsl-mc/fsl-mc-bus.c 			regions[i].start = region_desc.base_address +
base_address      375 drivers/bus/fsl-mc/fsl-mc-private.h 	u64 base_address;
base_address       90 drivers/char/xilinx_hwicap/buffer_icap.c 	return in_be32(drvdata->base_address + XHI_STATUS_REG_OFFSET);
base_address      101 drivers/char/xilinx_hwicap/buffer_icap.c static inline u32 buffer_icap_get_bram(void __iomem *base_address,
base_address      104 drivers/char/xilinx_hwicap/buffer_icap.c 	return in_be32(base_address + (offset << 2));
base_address      115 drivers/char/xilinx_hwicap/buffer_icap.c static inline bool buffer_icap_busy(void __iomem *base_address)
base_address      117 drivers/char/xilinx_hwicap/buffer_icap.c 	u32 status = in_be32(base_address + XHI_STATUS_REG_OFFSET);
base_address      129 drivers/char/xilinx_hwicap/buffer_icap.c static inline void buffer_icap_set_size(void __iomem *base_address,
base_address      132 drivers/char/xilinx_hwicap/buffer_icap.c 	out_be32(base_address + XHI_SIZE_REG_OFFSET, data);
base_address      143 drivers/char/xilinx_hwicap/buffer_icap.c static inline void buffer_icap_set_offset(void __iomem *base_address,
base_address      146 drivers/char/xilinx_hwicap/buffer_icap.c 	out_be32(base_address + XHI_BRAM_OFFSET_REG_OFFSET, data);
base_address      159 drivers/char/xilinx_hwicap/buffer_icap.c static inline void buffer_icap_set_rnc(void __iomem *base_address,
base_address      162 drivers/char/xilinx_hwicap/buffer_icap.c 	out_be32(base_address + XHI_RNC_REG_OFFSET, data);
base_address      174 drivers/char/xilinx_hwicap/buffer_icap.c static inline void buffer_icap_set_bram(void __iomem *base_address,
base_address      177 drivers/char/xilinx_hwicap/buffer_icap.c 	out_be32(base_address + (offset << 2), data);
base_address      192 drivers/char/xilinx_hwicap/buffer_icap.c 	void __iomem *base_address = drvdata->base_address;
base_address      194 drivers/char/xilinx_hwicap/buffer_icap.c 	if (buffer_icap_busy(base_address))
base_address      201 drivers/char/xilinx_hwicap/buffer_icap.c 	buffer_icap_set_size(base_address, (count << 2));
base_address      202 drivers/char/xilinx_hwicap/buffer_icap.c 	buffer_icap_set_offset(base_address, offset);
base_address      203 drivers/char/xilinx_hwicap/buffer_icap.c 	buffer_icap_set_rnc(base_address, XHI_READBACK);
base_address      205 drivers/char/xilinx_hwicap/buffer_icap.c 	while (buffer_icap_busy(base_address)) {
base_address      226 drivers/char/xilinx_hwicap/buffer_icap.c 	void __iomem *base_address = drvdata->base_address;
base_address      228 drivers/char/xilinx_hwicap/buffer_icap.c 	if (buffer_icap_busy(base_address))
base_address      235 drivers/char/xilinx_hwicap/buffer_icap.c 	buffer_icap_set_size(base_address, count << 2);
base_address      236 drivers/char/xilinx_hwicap/buffer_icap.c 	buffer_icap_set_offset(base_address, offset);
base_address      237 drivers/char/xilinx_hwicap/buffer_icap.c 	buffer_icap_set_rnc(base_address, XHI_CONFIGURE);
base_address      239 drivers/char/xilinx_hwicap/buffer_icap.c 	while (buffer_icap_busy(base_address)) {
base_address      258 drivers/char/xilinx_hwicap/buffer_icap.c     out_be32(drvdata->base_address + XHI_STATUS_REG_OFFSET, 0xFEFE);
base_address      274 drivers/char/xilinx_hwicap/buffer_icap.c 	void __iomem *base_address = drvdata->base_address;
base_address      280 drivers/char/xilinx_hwicap/buffer_icap.c 		buffer_icap_set_bram(base_address, buffer_count, data[i]);
base_address      330 drivers/char/xilinx_hwicap/buffer_icap.c 	void __iomem *base_address = drvdata->base_address;
base_address      356 drivers/char/xilinx_hwicap/buffer_icap.c 		data[i] = buffer_icap_get_bram(base_address, buffer_count);
base_address       97 drivers/char/xilinx_hwicap/fifo_icap.c 	out_be32(drvdata->base_address + XHI_WF_OFFSET, data);
base_address      108 drivers/char/xilinx_hwicap/fifo_icap.c 	u32 data = in_be32(drvdata->base_address + XHI_RF_OFFSET);
base_address      121 drivers/char/xilinx_hwicap/fifo_icap.c 	out_be32(drvdata->base_address + XHI_SZ_OFFSET, data);
base_address      130 drivers/char/xilinx_hwicap/fifo_icap.c 	out_be32(drvdata->base_address + XHI_CR_OFFSET, XHI_CR_WRITE_MASK);
base_address      140 drivers/char/xilinx_hwicap/fifo_icap.c 	out_be32(drvdata->base_address + XHI_CR_OFFSET, XHI_CR_READ_MASK);
base_address      162 drivers/char/xilinx_hwicap/fifo_icap.c 	u32 status = in_be32(drvdata->base_address + XHI_SR_OFFSET);
base_address      173 drivers/char/xilinx_hwicap/fifo_icap.c 	u32 status = in_be32(drvdata->base_address + XHI_SR_OFFSET);
base_address      186 drivers/char/xilinx_hwicap/fifo_icap.c 	return in_be32(drvdata->base_address + XHI_WFV_OFFSET);
base_address      198 drivers/char/xilinx_hwicap/fifo_icap.c 	return in_be32(drvdata->base_address + XHI_RFO_OFFSET);
base_address      364 drivers/char/xilinx_hwicap/fifo_icap.c 	reg_data = in_be32(drvdata->base_address + XHI_CR_OFFSET);
base_address      366 drivers/char/xilinx_hwicap/fifo_icap.c 	out_be32(drvdata->base_address + XHI_CR_OFFSET,
base_address      369 drivers/char/xilinx_hwicap/fifo_icap.c 	out_be32(drvdata->base_address + XHI_CR_OFFSET,
base_address      385 drivers/char/xilinx_hwicap/fifo_icap.c 	reg_data = in_be32(drvdata->base_address + XHI_CR_OFFSET);
base_address      387 drivers/char/xilinx_hwicap/fifo_icap.c 	out_be32(drvdata->base_address + XHI_CR_OFFSET,
base_address      390 drivers/char/xilinx_hwicap/fifo_icap.c 	out_be32(drvdata->base_address + XHI_CR_OFFSET,
base_address      664 drivers/char/xilinx_hwicap/xilinx_hwicap.c 	drvdata->base_address = ioremap(drvdata->mem_start, drvdata->mem_size);
base_address      665 drivers/char/xilinx_hwicap/xilinx_hwicap.c 	if (!drvdata->base_address) {
base_address      679 drivers/char/xilinx_hwicap/xilinx_hwicap.c 		 drvdata->base_address,
base_address      694 drivers/char/xilinx_hwicap/xilinx_hwicap.c 	iounmap(drvdata->base_address);
base_address      735 drivers/char/xilinx_hwicap/xilinx_hwicap.c 	iounmap(drvdata->base_address);
base_address       50 drivers/char/xilinx_hwicap/xilinx_hwicap.h 	void __iomem *base_address;/* virt. address of the control registers */
base_address      143 drivers/firmware/edd.c 			     info->params.interface_path.isa.base_address);
base_address      314 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c 				ip->base_address[k] = le32_to_cpu(ip->base_address[k]);
base_address      315 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c 				DRM_DEBUG("\t0x%08x\n", ip->base_address[k]);
base_address      323 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c 						ip->base_address;
base_address       96 drivers/gpu/drm/amd/include/discovery.h 	uint32_t base_address[1]; /* variable number of Addresses */
base_address      705 drivers/hwmon/xgene-hwmon.c 		ctx->comm_base_addr = cppc_ss->base_address;
base_address      516 drivers/i2c/busses/i2c-xgene-slimpro.c 		ctx->comm_base_addr = cppc_ss->base_address;
base_address      567 drivers/iio/adc/ad7606.c int ad7606_probe(struct device *dev, int irq, void __iomem *base_address,
base_address      585 drivers/iio/adc/ad7606.c 	st->base_address = base_address;
base_address       99 drivers/iio/adc/ad7606.h 	void __iomem			*base_address;
base_address      152 drivers/iio/adc/ad7606.h int ad7606_probe(struct device *dev, int irq, void __iomem *base_address,
base_address       23 drivers/iio/adc/ad7606_par.c 	insw((unsigned long)st->base_address, buf, count);
base_address       38 drivers/iio/adc/ad7606_par.c 	insb((unsigned long)st->base_address, buf, count * 2);
base_address       68 drivers/input/serio/xilinx_ps2.c 	void __iomem *base_address;	/* virt. address of control registers */
base_address       92 drivers/input/serio/xilinx_ps2.c 	sr = in_be32(drvdata->base_address + XPS2_STATUS_OFFSET);
base_address       94 drivers/input/serio/xilinx_ps2.c 		*byte = in_be32(drvdata->base_address + XPS2_RX_DATA_OFFSET);
base_address      112 drivers/input/serio/xilinx_ps2.c 	intr_sr = in_be32(drvdata->base_address + XPS2_IPISR_OFFSET);
base_address      113 drivers/input/serio/xilinx_ps2.c 	out_be32(drvdata->base_address + XPS2_IPISR_OFFSET, intr_sr);
base_address      165 drivers/input/serio/xilinx_ps2.c 	sr = in_be32(drvdata->base_address + XPS2_STATUS_OFFSET);
base_address      167 drivers/input/serio/xilinx_ps2.c 		out_be32(drvdata->base_address + XPS2_TX_DATA_OFFSET, c);
base_address      197 drivers/input/serio/xilinx_ps2.c 	out_be32(drvdata->base_address + XPS2_GIER_OFFSET, XPS2_GIER_GIE_MASK);
base_address      198 drivers/input/serio/xilinx_ps2.c 	out_be32(drvdata->base_address + XPS2_IPIER_OFFSET, XPS2_IPIXR_RX_ALL);
base_address      215 drivers/input/serio/xilinx_ps2.c 	out_be32(drvdata->base_address + XPS2_GIER_OFFSET, 0x00);
base_address      216 drivers/input/serio/xilinx_ps2.c 	out_be32(drvdata->base_address + XPS2_IPIER_OFFSET, 0x00);
base_address      278 drivers/input/serio/xilinx_ps2.c 	drvdata->base_address = ioremap(phys_addr, remap_size);
base_address      279 drivers/input/serio/xilinx_ps2.c 	if (drvdata->base_address == NULL) {
base_address      287 drivers/input/serio/xilinx_ps2.c 	out_be32(drvdata->base_address + XPS2_IPIER_OFFSET, 0);
base_address      293 drivers/input/serio/xilinx_ps2.c 	out_be32(drvdata->base_address + XPS2_SRST_OFFSET, XPS2_SRST_RESET);
base_address      296 drivers/input/serio/xilinx_ps2.c 		 (unsigned long long)phys_addr, drvdata->base_address,
base_address      338 drivers/input/serio/xilinx_ps2.c 	iounmap(drvdata->base_address);
base_address      475 drivers/iommu/dmar.c 		if (drhd->reg_base_addr == rhsa->base_address) {
base_address      487 drivers/iommu/dmar.c 		rhsa->base_address,
base_address      518 drivers/iommu/dmar.c 			(unsigned long long)rmrr->base_address,
base_address      528 drivers/iommu/dmar.c 		       (unsigned long long)rhsa->base_address,
base_address      317 drivers/iommu/intel-iommu.c 	u64	base_address;		/* reserved base address*/
base_address     2771 drivers/iommu/intel-iommu.c 			unsigned long long start = rmrr->base_address;
base_address     3426 drivers/iommu/intel-iommu.c 							  rmrr->base_address,
base_address     4315 drivers/iommu/intel-iommu.c 	rmrru->base_address = rmrr->base_address;
base_address     5687 drivers/iommu/intel-iommu.c 			length = rmrr->end_address - rmrr->base_address + 1;
base_address     5692 drivers/iommu/intel-iommu.c 			resv = iommu_alloc_resv_region(rmrr->base_address,
base_address      509 drivers/irqchip/irq-gic-v2m.c 	res.start = m->base_address;
base_address      510 drivers/irqchip/irq-gic-v2m.c 	res.end = m->base_address + SZ_4K - 1;
base_address      161 drivers/irqchip/irq-gic-v3-its-pci-msi.c 			      (long)its_entry->base_address);
base_address      119 drivers/irqchip/irq-gic-v3-its-platform-msi.c 			      (long)its_entry->base_address);
base_address     3940 drivers/irqchip/irq-gic-v3-its.c 	res.start = its_entry->base_address;
base_address     3941 drivers/irqchip/irq-gic-v3-its.c 	res.end = its_entry->base_address + ACPI_GICV3_ITS_MEM_SIZE - 1;
base_address     1829 drivers/irqchip/irq-gic-v3.c 	redist_base = ioremap(redist->base_address, redist->length);
base_address     1831 drivers/irqchip/irq-gic-v3.c 		pr_err("Couldn't map GICR region @%llx\n", redist->base_address);
base_address     1835 drivers/irqchip/irq-gic-v3.c 	gic_acpi_register_redist(redist->base_address, redist_base);
base_address     2050 drivers/irqchip/irq-gic-v3.c 	acpi_data.dist_base = ioremap(dist->base_address,
base_address     2075 drivers/irqchip/irq-gic-v3.c 	domain_handle = irq_domain_alloc_fwnode(&dist->base_address);
base_address     1519 drivers/irqchip/irq-gic.c 	gic_cpu_base = processor->base_address;
base_address     1619 drivers/irqchip/irq-gic.c 	gic->raw_dist_base = ioremap(dist->base_address,
base_address     1638 drivers/irqchip/irq-gic.c 	domain_handle = irq_domain_alloc_fwnode(&dist->base_address);
base_address      894 drivers/media/dvb-frontends/stb0899_drv.c 				    config->init_s2_demod[i].base_address,
base_address      907 drivers/media/dvb-frontends/stb0899_drv.c 				    config->init_s2_fec[i].base_address,
base_address       31 drivers/media/dvb-frontends/stb0899_drv.h 	u32	base_address;
base_address      142 drivers/misc/ibmasm/ibmasm.h 	void __iomem		*base_address;
base_address       26 drivers/misc/ibmasm/lowlevel.c 	mfa = get_mfa_inbound(sp->base_address);
base_address       33 drivers/misc/ibmasm/lowlevel.c 	message = get_i2o_message(sp->base_address, mfa);
base_address       38 drivers/misc/ibmasm/lowlevel.c 	set_mfa_inbound(sp->base_address, mfa);
base_address       47 drivers/misc/ibmasm/lowlevel.c 	void __iomem *base_address = sp->base_address;
base_address       50 drivers/misc/ibmasm/lowlevel.c 	if (!sp_interrupt_pending(base_address))
base_address       60 drivers/misc/ibmasm/lowlevel.c 	mfa = get_mfa_outbound(base_address);
base_address       62 drivers/misc/ibmasm/lowlevel.c 		struct i2o_message *msg = get_i2o_message(base_address, mfa);
base_address       67 drivers/misc/ibmasm/lowlevel.c 	set_mfa_outbound(base_address, mfa);
base_address       41 drivers/misc/ibmasm/lowlevel.h static inline int sp_interrupt_pending(void __iomem *base_address)
base_address       43 drivers/misc/ibmasm/lowlevel.h 	return SP_INTR_MASK & readl(base_address + INTR_STATUS_REGISTER);
base_address       46 drivers/misc/ibmasm/lowlevel.h static inline int uart_interrupt_pending(void __iomem *base_address)
base_address       48 drivers/misc/ibmasm/lowlevel.h 	return UART_INTR_MASK & readl(base_address + INTR_STATUS_REGISTER);
base_address       51 drivers/misc/ibmasm/lowlevel.h static inline void ibmasm_enable_interrupts(void __iomem *base_address, int mask)
base_address       53 drivers/misc/ibmasm/lowlevel.h 	void __iomem *ctrl_reg = base_address + INTR_CONTROL_REGISTER;
base_address       57 drivers/misc/ibmasm/lowlevel.h static inline void ibmasm_disable_interrupts(void __iomem *base_address, int mask)
base_address       59 drivers/misc/ibmasm/lowlevel.h 	void __iomem *ctrl_reg = base_address + INTR_CONTROL_REGISTER;
base_address       63 drivers/misc/ibmasm/lowlevel.h static inline void enable_sp_interrupts(void __iomem *base_address)
base_address       65 drivers/misc/ibmasm/lowlevel.h 	ibmasm_enable_interrupts(base_address, SP_INTR_MASK);
base_address       68 drivers/misc/ibmasm/lowlevel.h static inline void disable_sp_interrupts(void __iomem *base_address)
base_address       70 drivers/misc/ibmasm/lowlevel.h 	ibmasm_disable_interrupts(base_address, SP_INTR_MASK);
base_address       73 drivers/misc/ibmasm/lowlevel.h static inline void enable_uart_interrupts(void __iomem *base_address)
base_address       75 drivers/misc/ibmasm/lowlevel.h 	ibmasm_enable_interrupts(base_address, UART_INTR_MASK);
base_address       78 drivers/misc/ibmasm/lowlevel.h static inline void disable_uart_interrupts(void __iomem *base_address)
base_address       80 drivers/misc/ibmasm/lowlevel.h 	ibmasm_disable_interrupts(base_address, UART_INTR_MASK);
base_address       85 drivers/misc/ibmasm/lowlevel.h static inline u32 get_mfa_outbound(void __iomem *base_address)
base_address       91 drivers/misc/ibmasm/lowlevel.h 		mfa = readl(base_address + OUTBOUND_QUEUE_PORT);
base_address       98 drivers/misc/ibmasm/lowlevel.h static inline void set_mfa_outbound(void __iomem *base_address, u32 mfa)
base_address      100 drivers/misc/ibmasm/lowlevel.h 	writel(mfa, base_address + OUTBOUND_QUEUE_PORT);
base_address      103 drivers/misc/ibmasm/lowlevel.h static inline u32 get_mfa_inbound(void __iomem *base_address)
base_address      105 drivers/misc/ibmasm/lowlevel.h 	u32 mfa = readl(base_address + INBOUND_QUEUE_PORT);
base_address      113 drivers/misc/ibmasm/lowlevel.h static inline void set_mfa_inbound(void __iomem *base_address, u32 mfa)
base_address      115 drivers/misc/ibmasm/lowlevel.h 	writel(mfa, base_address + INBOUND_QUEUE_PORT);
base_address      118 drivers/misc/ibmasm/lowlevel.h static inline struct i2o_message *get_i2o_message(void __iomem *base_address, u32 mfa)
base_address      120 drivers/misc/ibmasm/lowlevel.h 	return (struct i2o_message *)(GET_MFA_ADDR(mfa) + base_address);
base_address       96 drivers/misc/ibmasm/module.c 	sp->base_address = pci_ioremap_bar(pdev, 0);
base_address       97 drivers/misc/ibmasm/module.c 	if (!sp->base_address) {
base_address      109 drivers/misc/ibmasm/module.c 	enable_sp_interrupts(sp->base_address);
base_address      134 drivers/misc/ibmasm/module.c 	disable_sp_interrupts(sp->base_address);
base_address      138 drivers/misc/ibmasm/module.c 	iounmap(sp->base_address);
base_address      165 drivers/misc/ibmasm/module.c 	disable_sp_interrupts(sp->base_address);
base_address      170 drivers/misc/ibmasm/module.c 	iounmap(sp->base_address);
base_address       75 drivers/misc/ibmasm/remote.h #define mouse_addr(sp)		(sp->base_address + CONDOR_MOUSE_DATA)
base_address       25 drivers/misc/ibmasm/uart.c 	iomem_base = sp->base_address + SCOUT_COM_B_BASE;
base_address       48 drivers/misc/ibmasm/uart.c 	enable_uart_interrupts(sp->base_address);
base_address       56 drivers/misc/ibmasm/uart.c 	disable_uart_interrupts(sp->base_address);
base_address     1007 drivers/net/wireless/rsi/rsi_91x_hal.c 	u32 instructions_sz, base_address;
base_address     1090 drivers/net/wireless/rsi/rsi_91x_hal.c 		base_address = metadata_p->address;
base_address     1092 drivers/net/wireless/rsi/rsi_91x_hal.c 							 base_address,
base_address      570 drivers/net/wireless/rsi/rsi_91x_sdio.c 					   u32 base_address,
base_address      581 drivers/net/wireless/rsi/rsi_91x_sdio.c 	msb_address = base_address >> 16;
base_address      599 drivers/net/wireless/rsi/rsi_91x_sdio.c 		lsb_address = (u16)base_address;
base_address      609 drivers/net/wireless/rsi/rsi_91x_sdio.c 		base_address += block_size;
base_address      611 drivers/net/wireless/rsi/rsi_91x_sdio.c 		if ((base_address >> 16) != msb_address) {
base_address      630 drivers/net/wireless/rsi/rsi_91x_sdio.c 		lsb_address = (u16)base_address;
base_address      492 drivers/net/wireless/rsi/rsi_91x_usb.c 					  u32 base_address,
base_address      506 drivers/net/wireless/rsi/rsi_91x_usb.c 		status = rsi_usb_write_register_multiple(adapter, base_address,
base_address      513 drivers/net/wireless/rsi/rsi_91x_usb.c 		base_address += block_size;
base_address      521 drivers/net/wireless/rsi/rsi_91x_usb.c 						(adapter, base_address,
base_address      192 drivers/nfc/s3fwrn5/firmware.c 	args.base_address = base_addr;
base_address       59 drivers/nfc/s3fwrn5/firmware.h 	__u32 base_address;
base_address      831 drivers/of/address.c 					u64 base_address)
base_address      838 drivers/of/address.c 		    res.start == base_address)
base_address      580 drivers/pinctrl/bcm/pinctrl-ns2-mux.c 	void __iomem *base_address;
base_address      615 drivers/pinctrl/bcm/pinctrl-ns2-mux.c 		base_address = pinctrl->base0;
base_address      619 drivers/pinctrl/bcm/pinctrl-ns2-mux.c 		base_address = pinctrl->base1;
base_address      627 drivers/pinctrl/bcm/pinctrl-ns2-mux.c 	val = readl(base_address + grp->mux.offset);
base_address      630 drivers/pinctrl/bcm/pinctrl-ns2-mux.c 	writel(val, (base_address + grp->mux.offset));
base_address      666 drivers/pinctrl/bcm/pinctrl-ns2-mux.c 	void __iomem *base_address;
base_address      668 drivers/pinctrl/bcm/pinctrl-ns2-mux.c 	base_address = pinctrl->pinconf_base;
base_address      670 drivers/pinctrl/bcm/pinctrl-ns2-mux.c 	val = readl(base_address + pin_data->pin_conf.offset);
base_address      676 drivers/pinctrl/bcm/pinctrl-ns2-mux.c 	writel(val, (base_address + pin_data->pin_conf.offset));
base_address      712 drivers/pinctrl/bcm/pinctrl-ns2-mux.c 	void __iomem *base_address;
base_address      714 drivers/pinctrl/bcm/pinctrl-ns2-mux.c 	base_address = pinctrl->pinconf_base;
base_address      716 drivers/pinctrl/bcm/pinctrl-ns2-mux.c 	val = readl(base_address + pin_data->pin_conf.offset);
base_address      722 drivers/pinctrl/bcm/pinctrl-ns2-mux.c 	writel(val, (base_address + pin_data->pin_conf.offset));
base_address      753 drivers/pinctrl/bcm/pinctrl-ns2-mux.c 	void __iomem *base_address;
base_address      755 drivers/pinctrl/bcm/pinctrl-ns2-mux.c 	base_address = pinctrl->pinconf_base;
base_address      757 drivers/pinctrl/bcm/pinctrl-ns2-mux.c 	val = readl(base_address + pin_data->pin_conf.offset);
base_address      764 drivers/pinctrl/bcm/pinctrl-ns2-mux.c 	writel(val, (base_address + pin_data->pin_conf.offset));
base_address      802 drivers/pinctrl/bcm/pinctrl-ns2-mux.c 	void __iomem *base_address;
base_address      808 drivers/pinctrl/bcm/pinctrl-ns2-mux.c 	base_address = pinctrl->pinconf_base;
base_address      810 drivers/pinctrl/bcm/pinctrl-ns2-mux.c 	val = readl(base_address + pin_data->pin_conf.offset);
base_address      813 drivers/pinctrl/bcm/pinctrl-ns2-mux.c 	writel(val, (base_address + pin_data->pin_conf.offset));
base_address      108 drivers/pinctrl/bcm/pinctrl-nsp-gpio.c 	void __iomem *base_address;
base_address      111 drivers/pinctrl/bcm/pinctrl-nsp-gpio.c 		base_address = chip->io_ctrl;
base_address      113 drivers/pinctrl/bcm/pinctrl-nsp-gpio.c 		base_address = chip->base;
base_address      115 drivers/pinctrl/bcm/pinctrl-nsp-gpio.c 	val = readl(base_address + reg);
base_address      121 drivers/pinctrl/bcm/pinctrl-nsp-gpio.c 	writel(val, base_address + reg);
base_address      397 drivers/pinctrl/bcm/pinctrl-nsp-mux.c 	void __iomem *base_address;
base_address      431 drivers/pinctrl/bcm/pinctrl-nsp-mux.c 		base_address = pinctrl->base0;
base_address      435 drivers/pinctrl/bcm/pinctrl-nsp-mux.c 		base_address = pinctrl->base1;
base_address      439 drivers/pinctrl/bcm/pinctrl-nsp-mux.c 		base_address = pinctrl->base2;
base_address      447 drivers/pinctrl/bcm/pinctrl-nsp-mux.c 	val = readl(base_address);
base_address      450 drivers/pinctrl/bcm/pinctrl-nsp-mux.c 	writel(val, base_address);
base_address      562 drivers/s390/block/dasd_eckd.c 	pfxdata->base_address = basepriv->ned->unit_addr;
base_address     4227 drivers/s390/block/dasd_eckd.c 	pfxdata.base_address = basepriv->ned->unit_addr;
base_address      236 drivers/s390/block/dasd_eckd.h 	__u8 base_address;
base_address       25 drivers/staging/board/board.c static bool find_by_address(u64 base_address)
base_address       32 drivers/staging/board/board.c 			if (res.start == base_address) {
base_address      571 include/acpi/actbl1.h 	u64 base_address;	/* 4K aligned base address */
base_address      597 include/acpi/actbl1.h 	u64 base_address;
base_address     1041 include/acpi/actbl1.h 	u64 base_address;
base_address      175 include/acpi/actbl2.h 	u64 base_address;	/* SMMU base address */
base_address      211 include/acpi/actbl2.h 	u64 base_address;	/* SMMUv3 base address */
base_address      307 include/acpi/actbl2.h 	u64 base_address;	/* IOMMU control registers */
base_address      637 include/acpi/actbl2.h 	u64 base_address;
base_address      660 include/acpi/actbl2.h 	u64 base_address;
base_address      683 include/acpi/actbl2.h 	u64 base_address;
base_address      698 include/acpi/actbl2.h 	u64 base_address;
base_address      708 include/acpi/actbl2.h 	u64 base_address;
base_address     1208 include/acpi/actbl2.h 	u64 base_address;
base_address     1225 include/acpi/actbl2.h 	u64 base_address;
base_address     1242 include/acpi/actbl2.h 	u64 base_address;
base_address     1262 include/acpi/actbl2.h 	u64 base_address;
base_address     1290 include/acpi/actbl2.h 	u64 base_address;
base_address      223 include/acpi/actbl3.h 	u64 base_address;
base_address       39 include/linux/of_address.h 					u64 base_address);
base_address       77 include/linux/of_address.h 					u64 base_address)
base_address       89 include/uapi/linux/edd.h 			__u16 base_address;
base_address       57 sound/pci/lx6464es/lx_core.c 	void __iomem *base_address = chip->port_dsp_bar;
base_address       58 sound/pci/lx6464es/lx_core.c 	return base_address + dsp_port_offsets[port]*4;
base_address      114 sound/pci/lx6464es/lx_core.c 	void __iomem *base_address = chip->port_plx_remapped;
base_address      115 sound/pci/lx6464es/lx_core.c 	return base_address + plx_port_offsets[port];
base_address       85 tools/arch/x86/include/uapi/asm/kvm.h 	__u64 base_address;