bar_mask          155 drivers/crypto/ccp/sp-pci.c 	int bar_mask;
bar_mask          181 drivers/crypto/ccp/sp-pci.c 	bar_mask = pci_select_bars(pdev, IORESOURCE_MEM);
bar_mask          182 drivers/crypto/ccp/sp-pci.c 	ret = pcim_iomap_regions(pdev, bar_mask, "ccp");
bar_mask          126 drivers/crypto/qat/qat_c3xxx/adf_drv.c 	unsigned long bar_mask;
bar_mask          233 drivers/crypto/qat/qat_c3xxx/adf_drv.c 	bar_mask = pci_select_bars(pdev, IORESOURCE_MEM);
bar_mask          234 drivers/crypto/qat/qat_c3xxx/adf_drv.c 	for_each_set_bit(bar_nr, &bar_mask, ADF_PCI_MAX_BARS * 2) {
bar_mask          128 drivers/crypto/qat/qat_c3xxxvf/adf_drv.c 	unsigned long bar_mask;
bar_mask          213 drivers/crypto/qat/qat_c3xxxvf/adf_drv.c 	bar_mask = pci_select_bars(pdev, IORESOURCE_MEM);
bar_mask          214 drivers/crypto/qat/qat_c3xxxvf/adf_drv.c 	for_each_set_bit(bar_nr, &bar_mask, ADF_PCI_MAX_BARS * 2) {
bar_mask          126 drivers/crypto/qat/qat_c62x/adf_drv.c 	unsigned long bar_mask;
bar_mask          233 drivers/crypto/qat/qat_c62x/adf_drv.c 	bar_mask = pci_select_bars(pdev, IORESOURCE_MEM);
bar_mask          234 drivers/crypto/qat/qat_c62x/adf_drv.c 	for_each_set_bit(bar_nr, &bar_mask, ADF_PCI_MAX_BARS * 2) {
bar_mask          128 drivers/crypto/qat/qat_c62xvf/adf_drv.c 	unsigned long bar_mask;
bar_mask          213 drivers/crypto/qat/qat_c62xvf/adf_drv.c 	bar_mask = pci_select_bars(pdev, IORESOURCE_MEM);
bar_mask          214 drivers/crypto/qat/qat_c62xvf/adf_drv.c 	for_each_set_bit(bar_nr, &bar_mask, ADF_PCI_MAX_BARS * 2) {
bar_mask          126 drivers/crypto/qat/qat_dh895xcc/adf_drv.c 	unsigned long bar_mask;
bar_mask          235 drivers/crypto/qat/qat_dh895xcc/adf_drv.c 	bar_mask = pci_select_bars(pdev, IORESOURCE_MEM);
bar_mask          236 drivers/crypto/qat/qat_dh895xcc/adf_drv.c 	for_each_set_bit(bar_nr, &bar_mask, ADF_PCI_MAX_BARS * 2) {
bar_mask          128 drivers/crypto/qat/qat_dh895xccvf/adf_drv.c 	unsigned long bar_mask;
bar_mask          213 drivers/crypto/qat/qat_dh895xccvf/adf_drv.c 	bar_mask = pci_select_bars(pdev, IORESOURCE_MEM);
bar_mask          214 drivers/crypto/qat/qat_dh895xccvf/adf_drv.c 	for_each_set_bit(bar_nr, &bar_mask, ADF_PCI_MAX_BARS * 2) {
bar_mask          216 drivers/net/ethernet/amd/xgbe/xgbe-pci.c 	int bar_mask;
bar_mask          238 drivers/net/ethernet/amd/xgbe/xgbe-pci.c 	bar_mask = pci_select_bars(pdev, IORESOURCE_MEM);
bar_mask          239 drivers/net/ethernet/amd/xgbe/xgbe-pci.c 	ret = pcim_iomap_regions(pdev, bar_mask, XGBE_DRV_NAME);
bar_mask          282 drivers/scsi/isci/init.c 	int err, bar_num, bar_mask = 0;
bar_mask          294 drivers/scsi/isci/init.c 		bar_mask |= 1 << (bar_num * 2);
bar_mask          296 drivers/scsi/isci/init.c 	err = pcim_iomap_regions(pdev, bar_mask, DRV_NAME);
bar_mask          164 samples/vfio-mdev/mbochs.c 	u64 bar_mask[3];
bar_mask          239 samples/vfio-mdev/mbochs.c 	mdev_state->bar_mask[0] = ~(mdev_state->memsize) + 1;
bar_mask          244 samples/vfio-mdev/mbochs.c 	mdev_state->bar_mask[2] = ~(MBOCHS_MMIO_BAR_SIZE) + 1;
bar_mask          318 samples/vfio-mdev/mbochs.c 			cfg_addr = (cfg_addr & mdev_state->bar_mask[index]);
bar_mask           92 samples/vfio-mdev/mdpy.c 	u32 bar_mask;
bar_mask          135 samples/vfio-mdev/mdpy.c 	mdev_state->bar_mask = ~(mdev_state->memsize) + 1;
bar_mask          161 samples/vfio-mdev/mdpy.c 			cfg_addr = (cfg_addr & mdev_state->bar_mask);
bar_mask          138 samples/vfio-mdev/mtty.c 	u32 bar_mask[VFIO_PCI_NUM_REGIONS];
bar_mask          199 samples/vfio-mdev/mtty.c 	mdev_state->bar_mask[0] = ~(MTTY_IO_BAR_SIZE) + 1;
bar_mask          204 samples/vfio-mdev/mtty.c 		mdev_state->bar_mask[1] = ~(MTTY_IO_BAR_SIZE) + 1;
bar_mask          240 samples/vfio-mdev/mtty.c 	u32 cfg_addr, bar_mask, bar_index = 0;
bar_mask          272 samples/vfio-mdev/mtty.c 			bar_mask = mdev_state->bar_mask[bar_index];
bar_mask          273 samples/vfio-mdev/mtty.c 			cfg_addr = (cfg_addr & bar_mask);