bar2_cax          667 arch/mips/include/asm/octeon/cvmx-npei-defs.h 		uint64_t bar2_cax:1;
bar2_cax          671 arch/mips/include/asm/octeon/cvmx-npei-defs.h 		uint64_t bar2_cax:1;
bar2_cax          710 arch/mips/include/asm/octeon/cvmx-npei-defs.h 		uint64_t bar2_cax:1;
bar2_cax          714 arch/mips/include/asm/octeon/cvmx-npei-defs.h 		uint64_t bar2_cax:1;
bar2_cax          809 arch/mips/include/asm/octeon/cvmx-pci-defs.h 		uint32_t bar2_cax:1;
bar2_cax          811 arch/mips/include/asm/octeon/cvmx-pci-defs.h 		uint32_t bar2_cax:1;
bar2_cax          852 arch/mips/include/asm/octeon/cvmx-pci-defs.h 		uint32_t bar2_cax:1;
bar2_cax          854 arch/mips/include/asm/octeon/cvmx-pci-defs.h 		uint32_t bar2_cax:1;
bar2_cax           96 arch/mips/include/asm/octeon/cvmx-pemx-defs.h 		uint64_t bar2_cax:1;
bar2_cax           98 arch/mips/include/asm/octeon/cvmx-pemx-defs.h 		uint64_t bar2_cax:1;
bar2_cax          391 arch/mips/pci/pci-octeon.c 	ctl_status_2.s.bar2_cax = 1;	/* Don't use L2 */
bar2_cax          969 arch/mips/pci/pcie-octeon.c 		npei_ctl_port.s.bar2_cax = 0;
bar2_cax          980 arch/mips/pci/pcie-octeon.c 		npei_ctl_port.s.bar2_cax = 0;
bar2_cax         1396 arch/mips/pci/pcie-octeon.c 	pemx_bar_ctl.s.bar2_cax = 0;