bar1 43 arch/alpha/include/asm/core_irongate.h igcsr32 bar1; /* 0x14 - BAR1 - GART */ bar1 345 arch/alpha/kernel/core_irongate.c mmio_regs = (u32 *)(((unsigned long)IRONGATE0->bar1 & bar1 69 arch/powerpc/platforms/52xx/mpc52xx_pci.c u32 bar1; /* PCI + 0x14 */ bar1 316 arch/powerpc/platforms/52xx/mpc52xx_pci.c out_be32(&pci_regs->bar1, PCI_BASE_ADDRESS_MEM_PREFETCH); bar1 41 arch/sparc/kernel/leon_pci_grpci1.c unsigned int bar1; /* 0x0C BAR1 (RO) */ bar1 36 drivers/gpu/drm/nouveau/nvkm/subdev/bar/base.c return device->bar->func->bar1.vmm(device->bar); bar1 44 drivers/gpu/drm/nouveau/nvkm/subdev/bar/base.c bar->func->bar1.init(bar); bar1 45 drivers/gpu/drm/nouveau/nvkm/subdev/bar/base.c bar->func->bar1.wait(bar); bar1 96 drivers/gpu/drm/nouveau/nvkm/subdev/bar/base.c if (bar->func->bar1.fini) bar1 97 drivers/gpu/drm/nouveau/nvkm/subdev/bar/base.c bar->func->bar1.fini(bar); bar1 105 drivers/gpu/drm/nouveau/nvkm/subdev/bar/base.c bar->func->bar1.init(bar); bar1 106 drivers/gpu/drm/nouveau/nvkm/subdev/bar/base.c bar->func->bar1.wait(bar); bar1 47 drivers/gpu/drm/nouveau/nvkm/subdev/bar/g84.c .bar1.init = nv50_bar_bar1_init, bar1 48 drivers/gpu/drm/nouveau/nvkm/subdev/bar/g84.c .bar1.fini = nv50_bar_bar1_fini, bar1 49 drivers/gpu/drm/nouveau/nvkm/subdev/bar/g84.c .bar1.wait = nv50_bar_bar1_wait, bar1 50 drivers/gpu/drm/nouveau/nvkm/subdev/bar/g84.c .bar1.vmm = nv50_bar_bar1_vmm, bar1 180 drivers/gpu/drm/nouveau/nvkm/subdev/bar/gf100.c .bar1.init = gf100_bar_bar1_init, bar1 181 drivers/gpu/drm/nouveau/nvkm/subdev/bar/gf100.c .bar1.fini = gf100_bar_bar1_fini, bar1 182 drivers/gpu/drm/nouveau/nvkm/subdev/bar/gf100.c .bar1.wait = gf100_bar_bar1_wait, bar1 183 drivers/gpu/drm/nouveau/nvkm/subdev/bar/gf100.c .bar1.vmm = gf100_bar_bar1_vmm, bar1 28 drivers/gpu/drm/nouveau/nvkm/subdev/bar/gk20a.c .bar1.init = gf100_bar_bar1_init, bar1 29 drivers/gpu/drm/nouveau/nvkm/subdev/bar/gk20a.c .bar1.wait = gf100_bar_bar1_wait, bar1 30 drivers/gpu/drm/nouveau/nvkm/subdev/bar/gk20a.c .bar1.vmm = gf100_bar_bar1_vmm, bar1 50 drivers/gpu/drm/nouveau/nvkm/subdev/bar/gm107.c .bar1.init = gf100_bar_bar1_init, bar1 51 drivers/gpu/drm/nouveau/nvkm/subdev/bar/gm107.c .bar1.fini = gf100_bar_bar1_fini, bar1 52 drivers/gpu/drm/nouveau/nvkm/subdev/bar/gm107.c .bar1.wait = gm107_bar_bar1_wait, bar1 53 drivers/gpu/drm/nouveau/nvkm/subdev/bar/gm107.c .bar1.vmm = gf100_bar_bar1_vmm, bar1 28 drivers/gpu/drm/nouveau/nvkm/subdev/bar/gm20b.c .bar1.init = gf100_bar_bar1_init, bar1 29 drivers/gpu/drm/nouveau/nvkm/subdev/bar/gm20b.c .bar1.wait = gm107_bar_bar1_wait, bar1 30 drivers/gpu/drm/nouveau/nvkm/subdev/bar/gm20b.c .bar1.vmm = gf100_bar_bar1_vmm, bar1 69 drivers/gpu/drm/nouveau/nvkm/subdev/bar/nv50.c nvkm_wr32(device, 0x001708, 0x80000000 | bar->bar1->node->offset >> 4); bar1 187 drivers/gpu/drm/nouveau/nvkm/subdev/bar/nv50.c ret = nvkm_gpuobj_new(device, 24, 16, false, bar->mem, &bar->bar1); bar1 191 drivers/gpu/drm/nouveau/nvkm/subdev/bar/nv50.c nvkm_kmap(bar->bar1); bar1 192 drivers/gpu/drm/nouveau/nvkm/subdev/bar/nv50.c nvkm_wo32(bar->bar1, 0x00, 0x7fc00000); bar1 193 drivers/gpu/drm/nouveau/nvkm/subdev/bar/nv50.c nvkm_wo32(bar->bar1, 0x04, lower_32_bits(limit)); bar1 194 drivers/gpu/drm/nouveau/nvkm/subdev/bar/nv50.c nvkm_wo32(bar->bar1, 0x08, lower_32_bits(start)); bar1 195 drivers/gpu/drm/nouveau/nvkm/subdev/bar/nv50.c nvkm_wo32(bar->bar1, 0x0c, upper_32_bits(limit) << 24 | bar1 197 drivers/gpu/drm/nouveau/nvkm/subdev/bar/nv50.c nvkm_wo32(bar->bar1, 0x10, 0x00000000); bar1 198 drivers/gpu/drm/nouveau/nvkm/subdev/bar/nv50.c nvkm_wo32(bar->bar1, 0x14, 0x00000000); bar1 199 drivers/gpu/drm/nouveau/nvkm/subdev/bar/nv50.c nvkm_done(bar->bar1); bar1 208 drivers/gpu/drm/nouveau/nvkm/subdev/bar/nv50.c nvkm_gpuobj_del(&bar->bar1); bar1 239 drivers/gpu/drm/nouveau/nvkm/subdev/bar/nv50.c .bar1.init = nv50_bar_bar1_init, bar1 240 drivers/gpu/drm/nouveau/nvkm/subdev/bar/nv50.c .bar1.fini = nv50_bar_bar1_fini, bar1 241 drivers/gpu/drm/nouveau/nvkm/subdev/bar/nv50.c .bar1.wait = nv50_bar_bar1_wait, bar1 242 drivers/gpu/drm/nouveau/nvkm/subdev/bar/nv50.c .bar1.vmm = nv50_bar_bar1_vmm, bar1 14 drivers/gpu/drm/nouveau/nvkm/subdev/bar/nv50.h struct nvkm_gpuobj *bar1; bar1 20 drivers/gpu/drm/nouveau/nvkm/subdev/bar/priv.h } bar1, bar2; bar1 83 drivers/gpu/drm/nouveau/nvkm/subdev/bar/tu102.c .bar1.init = tu102_bar_bar1_init, bar1 84 drivers/gpu/drm/nouveau/nvkm/subdev/bar/tu102.c .bar1.fini = tu102_bar_bar1_fini, bar1 85 drivers/gpu/drm/nouveau/nvkm/subdev/bar/tu102.c .bar1.wait = tu102_bar_bar1_wait, bar1 86 drivers/gpu/drm/nouveau/nvkm/subdev/bar/tu102.c .bar1.vmm = gf100_bar_bar1_vmm, bar1 17 drivers/media/pci/cobalt/cobalt-cpld.c return cobalt_bus_read32(cobalt->bar1, ADRS(offset)); bar1 22 drivers/media/pci/cobalt/cobalt-cpld.c return cobalt_bus_write32(cobalt->bar1, ADRS(offset), val); bar1 284 drivers/media/pci/cobalt/cobalt-driver.c if (cobalt->bar1) { bar1 285 drivers/media/pci/cobalt/cobalt-driver.c pci_iounmap(pci_dev, cobalt->bar1); bar1 286 drivers/media/pci/cobalt/cobalt-driver.c cobalt->bar1 = NULL; bar1 352 drivers/media/pci/cobalt/cobalt-driver.c cobalt->bar1 = pci_iomap(pci_dev, 1, 0); bar1 353 drivers/media/pci/cobalt/cobalt-driver.c if (cobalt->bar1 == NULL) { bar1 354 drivers/media/pci/cobalt/cobalt-driver.c cobalt->bar1 = pci_iomap(pci_dev, 2, 0); bar1 357 drivers/media/pci/cobalt/cobalt-driver.c if (!cobalt->bar0 || !cobalt->bar1) { bar1 406 drivers/media/pci/cobalt/cobalt-driver.c ioread8(cobalt->bar1 + COBALT_HDL_INFO_BASE + i); bar1 125 drivers/media/pci/cobalt/cobalt-driver.h (cobalt->bar1 + COBALT_VID_BASE + (c) * COBALT_VID_SIZE) bar1 127 drivers/media/pci/cobalt/cobalt-driver.h (cobalt->bar1 + COBALT_VID_BASE + (c) * COBALT_VID_SIZE + 0x100) bar1 129 drivers/media/pci/cobalt/cobalt-driver.h (cobalt->bar1 + COBALT_VID_BASE + (c) * COBALT_VID_SIZE + 0x200) bar1 131 drivers/media/pci/cobalt/cobalt-driver.h (cobalt->bar1 + COBALT_VID_BASE + (c) * COBALT_VID_SIZE + 0x300) bar1 133 drivers/media/pci/cobalt/cobalt-driver.h (cobalt->bar1 + COBALT_VID_BASE + (c) * COBALT_VID_SIZE + 0x400) bar1 135 drivers/media/pci/cobalt/cobalt-driver.h (cobalt->bar1 + COBALT_VID_BASE + (c) * COBALT_VID_SIZE + 0x500) bar1 137 drivers/media/pci/cobalt/cobalt-driver.h #define COBALT_TX_BASE(cobalt) (cobalt->bar1 + COBALT_VID_BASE + 0x5000) bar1 255 drivers/media/pci/cobalt/cobalt-driver.h void __iomem *bar0, *bar1; bar1 307 drivers/media/pci/cobalt/cobalt-driver.h iowrite32(val, cobalt->bar1 + reg); bar1 312 drivers/media/pci/cobalt/cobalt-driver.h return ioread32(cobalt->bar1 + reg); bar1 334 drivers/media/pci/cobalt/cobalt-driver.h #define ADRS_REG (bar1 + COBALT_BUS_BAR1_BASE + 0) bar1 335 drivers/media/pci/cobalt/cobalt-driver.h #define LOWER_DATA (bar1 + COBALT_BUS_BAR1_BASE + 4) bar1 336 drivers/media/pci/cobalt/cobalt-driver.h #define UPPER_DATA (bar1 + COBALT_BUS_BAR1_BASE + 6) bar1 338 drivers/media/pci/cobalt/cobalt-driver.h static inline u32 cobalt_bus_read32(void __iomem *bar1, u32 bus_adrs) bar1 344 drivers/media/pci/cobalt/cobalt-driver.h static inline void cobalt_bus_write16(void __iomem *bar1, bar1 354 drivers/media/pci/cobalt/cobalt-driver.h static inline void cobalt_bus_write32(void __iomem *bar1, bar1 91 drivers/media/pci/cobalt/cobalt-flash.c map->virt = cobalt->bar1; bar1 88 drivers/media/pci/cobalt/cobalt-i2c.c (cobalt->bar1 + COBALT_I2C_0_BASE); bar1 91 drivers/media/pci/cobalt/cobalt-i2c.c (cobalt->bar1 + COBALT_I2C_1_BASE); bar1 94 drivers/media/pci/cobalt/cobalt-i2c.c (cobalt->bar1 + COBALT_I2C_2_BASE); bar1 97 drivers/media/pci/cobalt/cobalt-i2c.c (cobalt->bar1 + COBALT_I2C_3_BASE); bar1 100 drivers/media/pci/cobalt/cobalt-i2c.c (cobalt->bar1 + COBALT_I2C_HSMA_BASE); bar1 441 drivers/media/pci/cobalt/cobalt-v4l2.c void __iomem *adrs = cobalt->bar1 + regs->reg; bar1 1933 drivers/net/ethernet/broadcom/bnxt/bnxt.c val = readl(bp->bar1 + reg_off); bar1 5361 drivers/net/ethernet/broadcom/bnxt/bnxt.c db->doorbell = bp->bar1 + 0x10000; bar1 5363 drivers/net/ethernet/broadcom/bnxt/bnxt.c db->doorbell = bp->bar1 + 0x4000; bar1 5381 drivers/net/ethernet/broadcom/bnxt/bnxt.c db->doorbell = bp->bar1 + map_idx * 0x80; bar1 10387 drivers/net/ethernet/broadcom/bnxt/bnxt.c if (bp->bar1) { bar1 10388 drivers/net/ethernet/broadcom/bnxt/bnxt.c pci_iounmap(pdev, bp->bar1); bar1 10389 drivers/net/ethernet/broadcom/bnxt/bnxt.c bp->bar1 = NULL; bar1 10614 drivers/net/ethernet/broadcom/bnxt/bnxt.c writel(val, bp->bar1 + reg_off); bar1 10827 drivers/net/ethernet/broadcom/bnxt/bnxt.c bp->bar1 = pci_ioremap_bar(pdev, 2); bar1 10828 drivers/net/ethernet/broadcom/bnxt/bnxt.c if (!bp->bar1) { bar1 1405 drivers/net/ethernet/broadcom/bnxt/bnxt.h void __iomem *bar1; bar1 1045 drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.c u64 bar1; bar1 1051 drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.c WRITE_ONCE(bar1, reg_adr); bar1 1052 drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.c lio_pci_writeq(oct, (READ_ONCE(bar1) & 0xFFFFFFFEULL), bar1 1056 drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.c WRITE_ONCE(bar1, reg_adr); bar1 1066 drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.c WRITE_ONCE(bar1, lio_pci_readq( bar1 417 drivers/net/ethernet/cavium/liquidio/cn66xx_device.c u64 bar1; bar1 420 drivers/net/ethernet/cavium/liquidio/cn66xx_device.c bar1 = lio_pci_readq(oct, CN6XXX_BAR1_REG(idx, oct->pcie_port)); bar1 421 drivers/net/ethernet/cavium/liquidio/cn66xx_device.c lio_pci_writeq(oct, (bar1 & 0xFFFFFFFEULL), bar1 423 drivers/net/ethernet/cavium/liquidio/cn66xx_device.c bar1 = lio_pci_readq(oct, CN6XXX_BAR1_REG(idx, oct->pcie_port)); bar1 433 drivers/net/ethernet/cavium/liquidio/cn66xx_device.c bar1 = lio_pci_readq(oct, CN6XXX_BAR1_REG(idx, oct->pcie_port)); bar1 662 drivers/net/ethernet/intel/ixgb/ixgb_hw.h u32 bar1; bar1 7847 drivers/net/ethernet/neterion/s2io.c sp->bar1 = pci_ioremap_bar(pdev, 2); bar1 7848 drivers/net/ethernet/neterion/s2io.c if (!sp->bar1) { bar1 7857 drivers/net/ethernet/neterion/s2io.c mac_control->tx_FIFO_start[j] = sp->bar1 + (j * 0x00020000); bar1 8120 drivers/net/ethernet/neterion/s2io.c iounmap(sp->bar1); bar1 8161 drivers/net/ethernet/neterion/s2io.c iounmap(sp->bar1); bar1 869 drivers/net/ethernet/neterion/s2io.h void __iomem *bar1; bar1 1628 drivers/scsi/aacraid/aacraid.h char __iomem *bar1; bar1 611 drivers/scsi/aacraid/src.c iounmap(dev->regs.src.bar1); bar1 612 drivers/scsi/aacraid/src.c dev->regs.src.bar1 = NULL; bar1 617 drivers/scsi/aacraid/src.c dev->regs.src.bar1 = ioremap(pci_resource_start(dev->pdev, 2), bar1 620 drivers/scsi/aacraid/src.c if (dev->regs.src.bar1 == NULL) bar1 624 drivers/scsi/aacraid/src.c iounmap(dev->regs.src.bar1); bar1 625 drivers/scsi/aacraid/src.c dev->regs.src.bar1 = NULL; bar1 646 drivers/scsi/aacraid/src.c dev->regs.src.bar1 = bar1 649 drivers/scsi/aacraid/src.c if (dev->regs.src.bar1 == NULL) bar1 653 drivers/scsi/aacraid/src.c iounmap(dev->regs.src.bar1); bar1 654 drivers/scsi/aacraid/src.c dev->regs.src.bar1 = NULL; bar1 986 drivers/scsi/aacraid/src.c dev->dbg_base_mapped = dev->regs.src.bar1; bar1 1296 drivers/scsi/aacraid/src.c dev->dbg_base_mapped = dev->regs.src.bar1; bar1 196 drivers/tty/serial/rp2.c void __iomem *bar1; bar1 487 drivers/tty/serial/rp2.c void __iomem *base = card->bar1 + RP2_ASIC_OFFSET(asic_id); bar1 600 drivers/tty/serial/rp2.c void __iomem *base = card->bar1 + RP2_ASIC_OFFSET(asic_id); bar1 686 drivers/tty/serial/rp2.c rp->asic_base = card->bar1; bar1 687 drivers/tty/serial/rp2.c rp->base = card->bar1 + RP2_PORT_BASE + j*RP2_PORT_SPACING; bar1 688 drivers/tty/serial/rp2.c rp->ucode = card->bar1 + RP2_UCODE_BASE + j*RP2_UCODE_SPACING; bar1 762 drivers/tty/serial/rp2.c card->bar1 = bars[1]; bar1 1791 sound/pci/ctxfi/cthw20k1.c unsigned int bar0, bar1, bar2, bar3, bar4, bar5; bar1 1838 sound/pci/ctxfi/cthw20k1.c pci_read_config_dword(pci, PCI_BASE_ADDRESS_1, &bar1); bar1 1856 sound/pci/ctxfi/cthw20k1.c pci_write_config_dword(pci, PCI_BASE_ADDRESS_1, bar1);