banks 110 arch/arm/kernel/tcm.c static int __init setup_tcm_bank(u8 type, u8 bank, u8 banks, banks 123 arch/arm/kernel/tcm.c if (banks > 1) banks 105 arch/arm/mach-omap2/pm-debug.c for (i = 0; i < pwrdm->banks; i++) banks 129 arch/arm/mach-omap2/powerdomain.c for (i = 0; i < pwrdm->banks; i++) banks 152 arch/arm/mach-omap2/powerdomain.c for (i = 0; i < pwrdm->banks; i++) { banks 515 arch/arm/mach-omap2/powerdomain.c return pwrdm->banks; banks 672 arch/arm/mach-omap2/powerdomain.c if (pwrdm->banks < (bank + 1)) banks 710 arch/arm/mach-omap2/powerdomain.c if (pwrdm->banks < (bank + 1)) banks 806 arch/arm/mach-omap2/powerdomain.c if (pwrdm->banks < (bank + 1)) banks 836 arch/arm/mach-omap2/powerdomain.c if (pwrdm->banks < (bank + 1)) banks 865 arch/arm/mach-omap2/powerdomain.c if (pwrdm->banks < (bank + 1)) banks 1171 arch/arm/mach-omap2/powerdomain.c for (i = 0; i < pwrdm->banks; i++) banks 1215 arch/arm/mach-omap2/powerdomain.c for (i = 0; i < pwrdm->banks; i++) banks 1220 arch/arm/mach-omap2/powerdomain.c for (i = 0; i < pwrdm->banks; i++) banks 119 arch/arm/mach-omap2/powerdomain.h const u8 banks; banks 47 arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c .banks = 1, banks 31 arch/arm/mach-omap2/powerdomains2xxx_data.c .banks = 1, banks 46 arch/arm/mach-omap2/powerdomains2xxx_data.c .banks = 1, banks 61 arch/arm/mach-omap2/powerdomains2xxx_data.c .banks = 3, banks 87 arch/arm/mach-omap2/powerdomains2xxx_data.c .banks = 1, banks 33 arch/arm/mach-omap2/powerdomains33xx_data.c .banks = 1, banks 84 arch/arm/mach-omap2/powerdomains33xx_data.c .banks = 3, banks 127 arch/arm/mach-omap2/powerdomains33xx_data.c .banks = 3, banks 37 arch/arm/mach-omap2/powerdomains3xxx_data.c .banks = 4, banks 59 arch/arm/mach-omap2/powerdomains3xxx_data.c .banks = 1, banks 75 arch/arm/mach-omap2/powerdomains3xxx_data.c .banks = 1, banks 100 arch/arm/mach-omap2/powerdomains3xxx_data.c .banks = 2, banks 122 arch/arm/mach-omap2/powerdomains3xxx_data.c .banks = 2, banks 139 arch/arm/mach-omap2/powerdomains3xxx_data.c .banks = 2, banks 156 arch/arm/mach-omap2/powerdomains3xxx_data.c .banks = 1, banks 171 arch/arm/mach-omap2/powerdomains3xxx_data.c .banks = 1, banks 192 arch/arm/mach-omap2/powerdomains3xxx_data.c .banks = 1, banks 207 arch/arm/mach-omap2/powerdomains3xxx_data.c .banks = 1, banks 222 arch/arm/mach-omap2/powerdomains3xxx_data.c .banks = 1, banks 237 arch/arm/mach-omap2/powerdomains3xxx_data.c .banks = 1, banks 252 arch/arm/mach-omap2/powerdomains3xxx_data.c .banks = 1, banks 296 arch/arm/mach-omap2/powerdomains3xxx_data.c .banks = 1, banks 23 arch/arm/mach-omap2/powerdomains43xx_data.c .banks = 1, banks 37 arch/arm/mach-omap2/powerdomains43xx_data.c .banks = 3, banks 65 arch/arm/mach-omap2/powerdomains43xx_data.c .banks = 1, banks 95 arch/arm/mach-omap2/powerdomains43xx_data.c .banks = 4, banks 38 arch/arm/mach-omap2/powerdomains44xx_data.c .banks = 5, banks 63 arch/arm/mach-omap2/powerdomains44xx_data.c .banks = 1, banks 81 arch/arm/mach-omap2/powerdomains44xx_data.c .banks = 2, banks 101 arch/arm/mach-omap2/powerdomains44xx_data.c .banks = 1, banks 119 arch/arm/mach-omap2/powerdomains44xx_data.c .banks = 3, banks 140 arch/arm/mach-omap2/powerdomains44xx_data.c .banks = 1, banks 157 arch/arm/mach-omap2/powerdomains44xx_data.c .banks = 1, banks 174 arch/arm/mach-omap2/powerdomains44xx_data.c .banks = 1, banks 190 arch/arm/mach-omap2/powerdomains44xx_data.c .banks = 1, banks 207 arch/arm/mach-omap2/powerdomains44xx_data.c .banks = 3, banks 228 arch/arm/mach-omap2/powerdomains44xx_data.c .banks = 4, banks 251 arch/arm/mach-omap2/powerdomains44xx_data.c .banks = 1, banks 269 arch/arm/mach-omap2/powerdomains44xx_data.c .banks = 1, banks 287 arch/arm/mach-omap2/powerdomains44xx_data.c .banks = 2, banks 36 arch/arm/mach-omap2/powerdomains54xx_data.c .banks = 5, banks 62 arch/arm/mach-omap2/powerdomains54xx_data.c .banks = 2, banks 91 arch/arm/mach-omap2/powerdomains54xx_data.c .banks = 1, banks 109 arch/arm/mach-omap2/powerdomains54xx_data.c .banks = 1, banks 126 arch/arm/mach-omap2/powerdomains54xx_data.c .banks = 1, banks 142 arch/arm/mach-omap2/powerdomains54xx_data.c .banks = 1, banks 159 arch/arm/mach-omap2/powerdomains54xx_data.c .banks = 2, banks 188 arch/arm/mach-omap2/powerdomains54xx_data.c .banks = 3, banks 209 arch/arm/mach-omap2/powerdomains54xx_data.c .banks = 1, banks 227 arch/arm/mach-omap2/powerdomains54xx_data.c .banks = 2, banks 246 arch/arm/mach-omap2/powerdomains54xx_data.c .banks = 1, banks 263 arch/arm/mach-omap2/powerdomains54xx_data.c .banks = 1, banks 279 arch/arm/mach-omap2/powerdomains54xx_data.c .banks = 4, banks 37 arch/arm/mach-omap2/powerdomains7xx_data.c .banks = 4, banks 78 arch/arm/mach-omap2/powerdomains7xx_data.c .banks = 2, banks 92 arch/arm/mach-omap2/powerdomains7xx_data.c .banks = 1, banks 105 arch/arm/mach-omap2/powerdomains7xx_data.c .banks = 2, banks 119 arch/arm/mach-omap2/powerdomains7xx_data.c .banks = 1, banks 132 arch/arm/mach-omap2/powerdomains7xx_data.c .banks = 1, banks 144 arch/arm/mach-omap2/powerdomains7xx_data.c .banks = 5, banks 170 arch/arm/mach-omap2/powerdomains7xx_data.c .banks = 1, banks 186 arch/arm/mach-omap2/powerdomains7xx_data.c .banks = 1, banks 201 arch/arm/mach-omap2/powerdomains7xx_data.c .banks = 1, banks 215 arch/arm/mach-omap2/powerdomains7xx_data.c .banks = 2, banks 232 arch/arm/mach-omap2/powerdomains7xx_data.c .banks = 3, banks 247 arch/arm/mach-omap2/powerdomains7xx_data.c .banks = 1, banks 260 arch/arm/mach-omap2/powerdomains7xx_data.c .banks = 1, banks 272 arch/arm/mach-omap2/powerdomains7xx_data.c .banks = 3, banks 287 arch/arm/mach-omap2/powerdomains7xx_data.c .banks = 3, banks 302 arch/arm/mach-omap2/powerdomains7xx_data.c .banks = 1, banks 315 arch/arm/mach-omap2/powerdomains7xx_data.c .banks = 1, banks 328 arch/arm/mach-omap2/powerdomains7xx_data.c .banks = 1, banks 341 arch/arm/mach-omap2/powerdomains7xx_data.c .banks = 1, banks 258 arch/mips/bcm63xx/cpu.c unsigned int cols = 0, rows = 0, is_32bits = 0, banks = 0; banks 274 arch/mips/bcm63xx/cpu.c banks = (val & SDRAM_CFG_BANK_MASK) ? 2 : 1; banks 282 arch/mips/bcm63xx/cpu.c banks = 2; banks 291 arch/mips/bcm63xx/cpu.c return 1 << (cols + rows + (is_32bits + 1) + banks); banks 152 arch/mips/include/asm/sibyte/bcm1480_regs.h #define A_BCM1480_L2_WAY_ENABLE(A, banks) (A | (((~(banks))&0x0F) << 8)) banks 268 arch/mips/sgi-ip27/ip27-memory.c klmembnk_t *banks; banks 278 arch/mips/sgi-ip27/ip27-memory.c banks = (klmembnk_t *) find_first_component(brd, KLSTRUCT_MEMBNK); banks 279 arch/mips/sgi-ip27/ip27-memory.c if (!banks) banks 283 arch/mips/sgi-ip27/ip27-memory.c size = (unsigned long)banks->membnk_bnksz[slot/4]; banks 44 arch/x86/boot/vesa.h u8 banks; /* 26 */ banks 76 arch/x86/kernel/cpu/mce/intel.c static int cmci_supported(int *banks) banks 93 arch/x86/kernel/cpu/mce/intel.c *banks = min_t(unsigned, MAX_NR_BANKS, cap & 0xff); banks 264 arch/x86/kernel/cpu/mce/intel.c static void cmci_discover(int banks) banks 272 arch/x86/kernel/cpu/mce/intel.c for (i = 0; i < banks; i++) { banks 342 arch/x86/kernel/cpu/mce/intel.c int banks; banks 344 arch/x86/kernel/cpu/mce/intel.c if (!mce_available(raw_cpu_ptr(&cpu_info)) || !cmci_supported(&banks)) banks 373 arch/x86/kernel/cpu/mce/intel.c int banks; banks 375 arch/x86/kernel/cpu/mce/intel.c if (!cmci_supported(&banks)) banks 378 arch/x86/kernel/cpu/mce/intel.c for (i = 0; i < banks; i++) banks 385 arch/x86/kernel/cpu/mce/intel.c int banks; banks 388 arch/x86/kernel/cpu/mce/intel.c if (cmci_supported(&banks)) banks 389 arch/x86/kernel/cpu/mce/intel.c cmci_discover(banks); banks 395 arch/x86/kernel/cpu/mce/intel.c int banks; banks 397 arch/x86/kernel/cpu/mce/intel.c if (!cmci_supported(&banks)) banks 408 arch/x86/kernel/cpu/mce/intel.c int banks; banks 409 arch/x86/kernel/cpu/mce/intel.c if (cmci_supported(&banks)) banks 410 arch/x86/kernel/cpu/mce/intel.c cmci_discover(banks); banks 415 arch/x86/kernel/cpu/mce/intel.c int banks; banks 418 arch/x86/kernel/cpu/mce/intel.c if (!cmci_supported(&banks)) banks 428 arch/x86/kernel/cpu/mce/intel.c int banks; banks 430 arch/x86/kernel/cpu/mce/intel.c if (!cmci_supported(&banks)) banks 434 arch/x86/kernel/cpu/mce/intel.c cmci_discover(banks); banks 3722 arch/x86/kvm/x86.c u64 *banks = vcpu->arch.mce_banks; banks 3733 arch/x86/kvm/x86.c banks += 4 * mce->bank; banks 3738 arch/x86/kvm/x86.c if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0) banks 3746 arch/x86/kvm/x86.c if (banks[1] & MCI_STATUS_VAL) banks 3748 arch/x86/kvm/x86.c banks[2] = mce->addr; banks 3749 arch/x86/kvm/x86.c banks[3] = mce->misc; banks 3751 arch/x86/kvm/x86.c banks[1] = mce->status; banks 3753 arch/x86/kvm/x86.c } else if (!(banks[1] & MCI_STATUS_VAL) banks 3754 arch/x86/kvm/x86.c || !(banks[1] & MCI_STATUS_UC)) { banks 3755 arch/x86/kvm/x86.c if (banks[1] & MCI_STATUS_VAL) banks 3757 arch/x86/kvm/x86.c banks[2] = mce->addr; banks 3758 arch/x86/kvm/x86.c banks[3] = mce->misc; banks 3759 arch/x86/kvm/x86.c banks[1] = mce->status; banks 3761 arch/x86/kvm/x86.c banks[1] |= MCI_STATUS_OVER; banks 202 drivers/clk/tegra/clk.c struct clk ** __init tegra_clk_init(void __iomem *regs, int num, int banks) banks 206 drivers/clk/tegra/clk.c if (WARN_ON(banks > ARRAY_SIZE(periph_regs))) banks 209 drivers/clk/tegra/clk.c periph_clk_enb_refcnt = kcalloc(32 * banks, banks 215 drivers/clk/tegra/clk.c periph_banks = banks; banks 82 drivers/crypto/qat/qat_common/adf_hw_arbiter.c void __iomem *csr = accel_dev->transport->banks[0].csr_addr; banks 125 drivers/crypto/qat/qat_common/adf_hw_arbiter.c csr = accel_dev->transport->banks[0].csr_addr; banks 175 drivers/crypto/qat/qat_common/adf_isr.c struct adf_etr_bank_data *bank = &etr_data->banks[i]; banks 222 drivers/crypto/qat/qat_common/adf_isr.c free_irq(msixe[i].vector, &etr_data->banks[i]); banks 286 drivers/crypto/qat/qat_common/adf_isr.c tasklet_init(&priv_data->banks[i].resp_handler, banks 288 drivers/crypto/qat/qat_common/adf_isr.c (unsigned long)&priv_data->banks[i]); banks 299 drivers/crypto/qat/qat_common/adf_isr.c tasklet_disable(&priv_data->banks[i].resp_handler); banks 300 drivers/crypto/qat/qat_common/adf_isr.c tasklet_kill(&priv_data->banks[i].resp_handler); banks 271 drivers/crypto/qat/qat_common/adf_transport.c bank = &transport_data->banks[bank_num]; banks 475 drivers/crypto/qat/qat_common/adf_transport.c etr_data->banks = kzalloc_node(size, GFP_KERNEL, banks 477 drivers/crypto/qat/qat_common/adf_transport.c if (!etr_data->banks) { banks 491 drivers/crypto/qat/qat_common/adf_transport.c ret = adf_init_bank(accel_dev, &etr_data->banks[i], i, banks 501 drivers/crypto/qat/qat_common/adf_transport.c kfree(etr_data->banks); banks 534 drivers/crypto/qat/qat_common/adf_transport.c cleanup_bank(&etr_data->banks[i]); banks 554 drivers/crypto/qat/qat_common/adf_transport.c kfree(etr_data->banks); banks 90 drivers/crypto/qat/qat_common/adf_transport_internal.h struct adf_etr_bank_data *banks; banks 224 drivers/crypto/qat/qat_common/adf_vf_isr.c struct adf_etr_bank_data *bank = &etr_data->banks[0]; banks 262 drivers/crypto/qat/qat_common/adf_vf_isr.c tasklet_init(&priv_data->banks[0].resp_handler, adf_response_handler, banks 263 drivers/crypto/qat/qat_common/adf_vf_isr.c (unsigned long)priv_data->banks); banks 271 drivers/crypto/qat/qat_common/adf_vf_isr.c tasklet_disable(&priv_data->banks[0].resp_handler); banks 272 drivers/crypto/qat/qat_common/adf_vf_isr.c tasklet_kill(&priv_data->banks[0].resp_handler); banks 163 drivers/crypto/qat/qat_common/qat_crypto.c int banks = GET_MAX_BANKS(accel_dev); banks 164 drivers/crypto/qat/qat_common/qat_crypto.c int instances = min(cpus, banks); banks 418 drivers/edac/i7core_edac.c static const int banks[] = { 4, 8, 16, -EINVAL }; banks 420 drivers/edac/i7core_edac.c return banks[bank & 0x3]; banks 582 drivers/edac/i7core_edac.c u32 banks, ranks, rows, cols; banks 590 drivers/edac/i7core_edac.c banks = numbank(MC_DOD_NUMBANK(dimm_dod[j])); banks 596 drivers/edac/i7core_edac.c size = (rows * cols * banks * ranks) >> (20 - 3); banks 601 drivers/edac/i7core_edac.c banks, ranks, rows, cols); banks 607 drivers/edac/i7core_edac.c switch (banks) { banks 1271 drivers/edac/pnd2_edac.c int i, j, ranks_of_dimm[DNV_MAX_DIMMS], banks, rowbits, colbits, memtype; banks 1278 drivers/edac/pnd2_edac.c banks = 16; banks 1282 drivers/edac/pnd2_edac.c banks = 8; banks 1320 drivers/edac/pnd2_edac.c capacity = ranks_of_dimm[j] * banks * (1ul << rowbits) * (1ul << colbits); banks 1589 drivers/edac/sb_edac.c unsigned int i, j, banks, ranks, rows, cols, npages; banks 1603 drivers/edac/sb_edac.c banks = 16; banks 1605 drivers/edac/sb_edac.c banks = 8; banks 1647 drivers/edac/sb_edac.c ((u64) cols * ranks * banks * 8); banks 1653 drivers/edac/sb_edac.c size = ((u64)rows * cols * banks * ranks) >> (20 - 3); banks 1659 drivers/edac/sb_edac.c banks, ranks, rows, cols); banks 289 drivers/edac/skx_common.c int banks = 16, ranks, rows, cols, npages; banks 299 drivers/edac/skx_common.c size = ((1ull << (rows + cols + ranks)) * banks) >> (20 - 3); banks 304 drivers/edac/skx_common.c banks, 1 << ranks, rows, cols); banks 665 drivers/gpio/gpio-aspeed.c unsigned int i, p, girq, banks; banks 671 drivers/gpio/gpio-aspeed.c banks = DIV_ROUND_UP(gpio->chip.ngpio, 32); banks 672 drivers/gpio/gpio-aspeed.c for (i = 0; i < banks; i++) { banks 1143 drivers/gpio/gpio-aspeed.c int rc, i, banks, err; banks 1186 drivers/gpio/gpio-aspeed.c banks = DIV_ROUND_UP(gpio->chip.ngpio, 32); banks 1188 drivers/gpio/gpio-aspeed.c banks, sizeof(u32), GFP_KERNEL); banks 1196 drivers/gpio/gpio-aspeed.c for (i = 0; i < banks; i++) { banks 73 drivers/gpio/gpio-bcm-kona.c struct bcm_kona_gpio_bank *banks; banks 599 drivers/gpio/gpio-bcm-kona.c kona_gpio->banks = devm_kcalloc(dev, banks 601 drivers/gpio/gpio-bcm-kona.c sizeof(*kona_gpio->banks), banks 603 drivers/gpio/gpio-bcm-kona.c if (!kona_gpio->banks) banks 627 drivers/gpio/gpio-bcm-kona.c bank = &kona_gpio->banks[i]; banks 648 drivers/gpio/gpio-bcm-kona.c bank = &kona_gpio->banks[i]; banks 82 drivers/gpio/gpio-pxa.c struct pxa_gpio_bank *banks; banks 151 drivers/gpio/gpio-pxa.c for (i = 0, b = pc->banks; i <= pxa_last_gpio; i += 32, b++) banks 163 drivers/gpio/gpio-pxa.c struct pxa_gpio_bank *bank = p->banks + (gpio / 32); banks 171 drivers/gpio/gpio-pxa.c return chip_to_pxachip(c)->banks + gpio / 32; banks 352 drivers/gpio/gpio-pxa.c pchip->banks = devm_kcalloc(pchip->dev, nbanks, sizeof(*pchip->banks), banks 354 drivers/gpio/gpio-pxa.c if (!pchip->banks) banks 377 drivers/gpio/gpio-pxa.c bank = pchip->banks + i; banks 508 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv50.c int colbits, rowbitsa, rowbitsb, banks; banks 521 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv50.c banks = 1 << (((r4 & 0x03000000) >> 24) + 2); banks 523 drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv50.c rowsize = ram->parts * banks * (1 << colbits) * 8; banks 54 drivers/memory/fsl_ifc.c for (i = 0; i < fsl_ifc_ctrl_dev->banks; i++) { banks 206 drivers/memory/fsl_ifc.c int version, banks; banks 236 drivers/memory/fsl_ifc.c banks = (version == FSL_IFC_VERSION_1_0_0) ? 4 : 8; banks 238 drivers/memory/fsl_ifc.c version >> 24, (version >> 16) & 0xf, banks); banks 241 drivers/memory/fsl_ifc.c fsl_ifc_ctrl_dev->banks = banks; banks 999 drivers/mtd/nand/raw/fsl_ifc_nand.c for (bank = 0; bank < fsl_ifc_ctrl_dev->banks; bank++) { banks 1004 drivers/mtd/nand/raw/fsl_ifc_nand.c if (bank >= fsl_ifc_ctrl_dev->banks) { banks 3518 drivers/net/ethernet/chelsio/cxgb3/t3_hw.c unsigned int banks = !!(cfg & F_BKS) + 1; banks 3521 drivers/net/ethernet/chelsio/cxgb3/t3_hw.c unsigned int MBs = ((256 << density) * banks) / (org << width); banks 92 drivers/net/ethernet/marvell/octeontx2/af/rvu.h u8 banks; /* Number of MCAM banks */ banks 997 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c mcam->banks = (cfg >> 44) & 0xF; banks 1004 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c mcam->total_entries = (mcam->banks / BIT_ULL(cfg)) * mcam->banksize; banks 2985 drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c u8 dw, rows, cols, banks, ranks; banks 3006 drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c banks = NETXEN_DIMM_NUMBANKS(val); banks 3052 drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c if (!banks) { banks 3053 drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c netdev_err(netdev, "Invalid no of banks %x\n", banks); banks 3089 drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c dimm.size = ((1 << rows) * (1 << cols) * dw * banks * ranks) / 8; banks 1048 drivers/pinctrl/meson/pinctrl-meson-axg.c .banks = meson_axg_periphs_banks, banks 1062 drivers/pinctrl/meson/pinctrl-meson-axg.c .banks = meson_axg_aobus_banks, banks 1370 drivers/pinctrl/meson/pinctrl-meson-g12a.c .banks = meson_g12a_periphs_banks, banks 1384 drivers/pinctrl/meson/pinctrl-meson-g12a.c .banks = meson_g12a_aobus_banks, banks 835 drivers/pinctrl/meson/pinctrl-meson-gxbb.c .banks = meson_gxbb_periphs_banks, banks 848 drivers/pinctrl/meson/pinctrl-meson-gxbb.c .banks = meson_gxbb_aobus_banks, banks 804 drivers/pinctrl/meson/pinctrl-meson-gxl.c .banks = meson_gxl_periphs_banks, banks 817 drivers/pinctrl/meson/pinctrl-meson-gxl.c .banks = meson_gxl_aobus_banks, banks 74 drivers/pinctrl/meson/pinctrl-meson.c if (pin >= pc->data->banks[i].first && banks 75 drivers/pinctrl/meson/pinctrl-meson.c pin <= pc->data->banks[i].last) { banks 76 drivers/pinctrl/meson/pinctrl-meson.c *bank = &pc->data->banks[i]; banks 113 drivers/pinctrl/meson/pinctrl-meson.h struct meson_bank *banks; banks 1087 drivers/pinctrl/meson/pinctrl-meson8.c .banks = meson8_cbus_banks, banks 1100 drivers/pinctrl/meson/pinctrl-meson8.c .banks = meson8_aobus_banks, banks 946 drivers/pinctrl/meson/pinctrl-meson8b.c .banks = meson8b_cbus_banks, banks 959 drivers/pinctrl/meson/pinctrl-meson8b.c .banks = meson8b_aobus_banks, banks 324 drivers/pinctrl/pinctrl-st.c struct st_gpio_bank *banks; banks 1142 drivers/pinctrl/pinctrl-st.c struct st_pio_control *pc = &info->banks[bank].pc; banks 1445 drivers/pinctrl/pinctrl-st.c __gpio_irq_handler(&info->banks[n]); banks 1475 drivers/pinctrl/pinctrl-st.c struct st_gpio_bank *bank = &info->banks[bank_nr]; banks 1588 drivers/pinctrl/pinctrl-st.c info->banks = devm_kcalloc(&pdev->dev, banks 1589 drivers/pinctrl/pinctrl-st.c info->nbanks, sizeof(*info->banks), GFP_KERNEL); banks 1591 drivers/pinctrl/pinctrl-st.c if (!info->functions || !info->groups || !info->banks) banks 1634 drivers/pinctrl/pinctrl-st.c k = info->banks[bank].range.pin_base; banks 1635 drivers/pinctrl/pinctrl-st.c bank_name = info->banks[bank].range.name; banks 1696 drivers/pinctrl/pinctrl-st.c pinctrl_add_gpio_range(info->pctl, &info->banks[i].range); banks 328 drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c u8 banks = 0; banks 338 drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c banks |= BIT(2); banks 340 drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c banks |= BIT(3); banks 344 drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c banks |= BIT(2); banks 346 drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c banks |= BIT(3); banks 357 drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c banks |= BIT(2); banks 359 drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c banks |= BIT(3); banks 363 drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c banks |= BIT(3); banks 367 drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c banks |= BIT(0) | BIT(1); banks 372 drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c banks |= BIT(0) | BIT(1); banks 376 drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c banks |= BIT(0); banks 384 drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c banks |= BIT(3); banks 388 drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c banks |= BIT(1); banks 392 drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c banks |= BIT(1); banks 402 drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c if (banks & BIT(0)) { banks 408 drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c if (banks & BIT(1)) { banks 415 drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c if (banks & BIT(2)) { banks 420 drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c if (banks & BIT(3)) { banks 426 drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c if (banks & BIT(4)) { banks 431 drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c if (banks & BIT(5)) { banks 454 drivers/pinctrl/samsung/pinctrl-exynos.c struct samsung_pin_bank *b = eintd->banks[i]; banks 570 drivers/pinctrl/samsung/pinctrl-exynos.c muxed_data->banks[idx++] = bank; banks 130 drivers/pinctrl/samsung/pinctrl-exynos.h struct samsung_pin_bank *banks[]; banks 355 drivers/pinctrl/sirf/pinctrl-atlas7.c struct atlas7_gpio_bank banks[0]; banks 5407 drivers/pinctrl/sirf/pinctrl-atlas7.c u32 banks = ATLAS7_PINCTRL_REG_BANKS; banks 5442 drivers/pinctrl/sirf/pinctrl-atlas7.c for (idx = 0; idx < banks; idx++) { banks 5467 drivers/pinctrl/sirf/pinctrl-atlas7.c for (idx = 0; idx < banks; idx++) { banks 5618 drivers/pinctrl/sirf/pinctrl-atlas7.c return &a7gc->banks[GPIO_TO_BANK(gpio)]; banks 5789 drivers/pinctrl/sirf/pinctrl-atlas7.c bank = &a7gc->banks[idx]; banks 6009 drivers/pinctrl/sirf/pinctrl-atlas7.c a7gc = devm_kzalloc(&pdev->dev, struct_size(a7gc, banks, nbank), banks 6072 drivers/pinctrl/sirf/pinctrl-atlas7.c bank = &a7gc->banks[idx]; banks 6108 drivers/pinctrl/sirf/pinctrl-atlas7.c bank = &a7gc->banks[idx]; banks 6126 drivers/pinctrl/sirf/pinctrl-atlas7.c bank = &a7gc->banks[idx]; banks 104 drivers/pinctrl/stm32/pinctrl-stm32.c struct stm32_gpio_bank *banks; banks 1148 drivers/pinctrl/stm32/pinctrl-stm32.c struct stm32_gpio_bank *bank = &pctl->banks[pctl->nbanks]; banks 1198 drivers/pinctrl/stm32/pinctrl-stm32.c &pctl->banks[bank_nr].range); banks 1367 drivers/pinctrl/stm32/pinctrl-stm32.c int i, ret, hwlock_id, banks = 0; banks 1458 drivers/pinctrl/stm32/pinctrl-stm32.c banks++; banks 1460 drivers/pinctrl/stm32/pinctrl-stm32.c if (!banks) { banks 1464 drivers/pinctrl/stm32/pinctrl-stm32.c pctl->banks = devm_kcalloc(dev, banks, sizeof(*pctl->banks), banks 1466 drivers/pinctrl/stm32/pinctrl-stm32.c if (!pctl->banks) banks 456 drivers/pinctrl/vt8500/pinctrl-vt8500.c data->banks = vt8500_banks; banks 487 drivers/pinctrl/vt8500/pinctrl-wm8505.c data->banks = wm8505_banks; banks 325 drivers/pinctrl/vt8500/pinctrl-wm8650.c data->banks = wm8650_banks; banks 364 drivers/pinctrl/vt8500/pinctrl-wm8750.c data->banks = wm8750_banks; banks 343 drivers/pinctrl/vt8500/pinctrl-wm8850.c data->banks = wm8850_banks; banks 89 drivers/pinctrl/vt8500/pinctrl-wmt.c u32 reg_en = data->banks[bank].reg_en; banks 90 drivers/pinctrl/vt8500/pinctrl-wmt.c u32 reg_dir = data->banks[bank].reg_dir; banks 426 drivers/pinctrl/vt8500/pinctrl-wmt.c u32 reg_pull_en = data->banks[bank].reg_pull_en; banks 427 drivers/pinctrl/vt8500/pinctrl-wmt.c u32 reg_pull_cfg = data->banks[bank].reg_pull_cfg; banks 485 drivers/pinctrl/vt8500/pinctrl-wmt.c u32 reg_dir = data->banks[bank].reg_dir; banks 498 drivers/pinctrl/vt8500/pinctrl-wmt.c u32 reg_data_in = data->banks[bank].reg_data_in; banks 514 drivers/pinctrl/vt8500/pinctrl-wmt.c u32 reg_data_out = data->banks[bank].reg_data_out; banks 57 drivers/pinctrl/vt8500/pinctrl-wmt.h const struct wmt_pinctrl_bank_registers *banks; banks 266 drivers/thermal/mtk_thermal.c struct mtk_thermal_bank banks[MAX_NUM_ZONES]; banks 623 drivers/thermal/mtk_thermal.c struct mtk_thermal_bank *bank = &mt->banks[i]; banks 645 drivers/thermal/mtk_thermal.c struct mtk_thermal_bank *bank = &mt->banks[num]; banks 844 include/linux/fsl_ifc.h int banks; banks 1421 include/linux/platform_data/cros_ec_commands.h struct ec_flash_bank banks[0]; banks 19 include/linux/platform_data/jz4740/jz4740_nand.h unsigned char banks[JZ_NAND_NUM_BANKS]; banks 51 include/video/uvesafb.h u8 banks;