bank_width 53 arch/arm/mach-omap1/gpio15xx.c .bank_width = 16, bank_width 94 arch/arm/mach-omap1/gpio15xx.c .bank_width = 16, bank_width 61 arch/arm/mach-omap1/gpio16xx.c .bank_width = 16, bank_width 106 arch/arm/mach-omap1/gpio16xx.c .bank_width = 16, bank_width 134 arch/arm/mach-omap1/gpio16xx.c .bank_width = 16, bank_width 162 arch/arm/mach-omap1/gpio16xx.c .bank_width = 16, bank_width 190 arch/arm/mach-omap1/gpio16xx.c .bank_width = 16, bank_width 60 arch/arm/mach-omap1/gpio7xx.c .bank_width = 16, bank_width 100 arch/arm/mach-omap1/gpio7xx.c .bank_width = 32, bank_width 128 arch/arm/mach-omap1/gpio7xx.c .bank_width = 32, bank_width 156 arch/arm/mach-omap1/gpio7xx.c .bank_width = 32, bank_width 184 arch/arm/mach-omap1/gpio7xx.c .bank_width = 32, bank_width 212 arch/arm/mach-omap1/gpio7xx.c .bank_width = 32, bank_width 240 arch/arm/mach-omap1/gpio7xx.c .bank_width = 32, bank_width 196 drivers/edac/thunderx_edac.c int bank_width; bank_width 505 drivers/edac/thunderx_edac.c bank ^= get_bits(addr, 12 + lmc->xbits, lmc->bank_width); bank_width 746 drivers/edac/thunderx_edac.c lmc->bank_width = (FIELD_GET(LMC_DDR_PLL_CTL_DDR4, lmc_ddr_pll_ctl) && bank_width 756 drivers/edac/thunderx_edac.c lmc->col_hi_lsb = lmc->bank_lsb + lmc->bank_width; bank_width 615 drivers/gpio/gpio-brcmstb.c u32 bank_width; bank_width 661 drivers/gpio/gpio-brcmstb.c bank_width) { bank_width 669 drivers/gpio/gpio-brcmstb.c if (bank_width == 0) { bank_width 685 drivers/gpio/gpio-brcmstb.c if (bank_width <= 0 || bank_width > MAX_GPIO_PER_BANK) { bank_width 686 drivers/gpio/gpio-brcmstb.c dev_err(dev, "Invalid bank width %d\n", bank_width); bank_width 690 drivers/gpio/gpio-brcmstb.c bank->width = bank_width; bank_width 1310 drivers/gpio/gpio-omap.c .bank_width = 32, bank_width 1316 drivers/gpio/gpio-omap.c .bank_width = 32, bank_width 1322 drivers/gpio/gpio-omap.c .bank_width = 32, bank_width 1394 drivers/gpio/gpio-omap.c bank->width = pdata->bank_width; bank_width 2838 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c tiling_info->gfx8.bank_width = bankw; bank_width 143 drivers/gpu/drm/amd/display/dc/core/dc_debug.c plane_state->tiling_info.gfx8.bank_width, bank_width 235 drivers/gpu/drm/amd/display/dc/core/dc_debug.c update->plane_info->tiling_info.gfx8.bank_width, bank_width 329 drivers/gpu/drm/amd/display/dc/dc_hw_types.h unsigned int bank_width; bank_width 375 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c GRPH_BANK_WIDTH, info->gfx8.bank_width, bank_width 174 drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c set_reg_field_value(value, info->gfx8.bank_width, bank_width 182 include/linux/platform_data/gpio-omap.h int bank_width; /* GPIO bank width */